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IDTCSP2510C Datasheet(PDF) 6 Page - Integrated Device Technology |
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IDTCSP2510C Datasheet(HTML) 6 Page - Integrated Device Technology |
6 / 9 page 6 0ºC TO 85ºC TEMPERATURE RANGE IDTCSP2510C 3.3V PHASE-LOCK LOOP CLOCK DRIVER From Output Under Test 500Ω C L=30pF (2) Y CF FBIN CLK CSP2510C FBOUT PCBTRACE CL = 30pF(2) 500Ω on each Y output CLK tPHASE ERROR FBIN FBOUT tSK(o) Any Y Any Y tSK(o) Any Y Input Output or FBIN 50% VDD 50% VDD tR tF 2V 0.4V 3V 0V 2V 0.4V tPHASE ER ROR VOL VOH PARAMETER MEASUREMENT INFORMATION(1) Load Circuit and Voltage Waveforms Phase ERROR and Skew Calculations (3,4) NOTES: 1. All inputs pulses are supplied by generators having the following characteristics: PRR ≤ 100MHz ZO = 50Ω, tR ≤ 1.2 ns, tF≤ 1.2 ns. 2. CL includes probe and jig capacitance. 3. The outputs are measured one at a time with one transition per measurement. 4. Phase error measurements require equal loading at outputs Y and FBOUT. CF = CL – CFBIN – CPCBTRACE; CFBIN ≅ 6pF. |
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