SCL2

SDA2

SCL1

SDA1

GND

8

7

6

5

1

2

3

4

SW

SW

EN

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9

PCA9306-Q1

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SCPS178B – JULY 2007 – REVISED APRIL 2016

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9 Detailed Description

9.1 Overview

operates without the use of a direction pin. The voltage supply range for VREF1 is 1.2 V to 3.3 V and the supply

range for VREF2 is 1.8 V to 5.5 V.

The PCA9306-Q1 can also be used to run two buses, one at a 400-kHz operating frequency and the other at a

100-kHz operating frequency. If the two buses are operating at different frequencies, the 100-kHz bus must be

isolated by using the EN pin when the 400-kHz operation of the main bus is required. If the master is running at

400 kHz, the maximum system operating frequency may be less than 400 kHz because of the delays added by

the repeater.

capacitive load on both sides of the PCA9306-Q1 must be considered when approximating the total load of the

system, ensuring the sum of both sides is under 400 pF.

Both the SDA and SCL channels of the PCA9306-Q1 have the same electrical characteristics and there is

minimal deviation from one output to another in voltage or propagation delay. This characteristic is a benefit over

discrete transistor voltage translation solutions, because the fabrication of the switch is symmetrical. The

translator provides excellent ESD protection to lower-voltage devices and at the same time protects less ESD-

resistant devices.

9.2 Functional Block Diagram

Figure 4. Logic Diagram (Positive Logic)