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FEATURES

3

2

5

8

1

1D

GND

3

2

4

5

1

V

CC

V

CC

V

CC

1Q

1Q

1D

GND

1D

GND

2CLK

Seemechanicaldrawingsfordimensions.

2

5

3

4

8

2Q

2D

2CLK

4

6

7

6

7

8

6

1

7

DCTPACKAGE

(TOP VIEW)

DCUPACKAGE

(TOP VIEW)

YZP PACKAGE

(BOTTOMVIEW)

1CLK

1CLK

1CLK

2Q

2Q

1Q

2D

2CLK

2D

DESCRIPTION/ORDERING INFORMATION

SN74AUC2G80

DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

SCES540C – JANUARY 2004 – REVISED JANUARY 2007

• Available in the Texas Instruments

• Low Power Consumption, 10-µA Max I

CC

NanoFree™ Package

• ±8-mA Output Drive at 1.8 V

• Optimized for 1.8-V Operation and Is 3.6-V

• Latch-Up Performance Exceeds 100 mA Per

I/O Tolerant to Support Mixed-Mode Signal

JESD 78, Class II

Operation

• ESD Protection Exceeds JESD 22

• I

–

2000-V Human-Body Model (A114-A)

Operation

–

200-V Machine Model (A115-A)

• Sub-1-V Operable

–

1000-V Charged-Device Model (C101)

• Max t

When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the

positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the

rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without

affecting the levels at the outputs.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

preventing damaging current backflow through the device when it is powered down.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoFree™ – WCSP (DSBGA)

Reel of 3000

SN74AUC2G80YZPR

_ _ _UX_

0.23-mm Large Bump – YZP (Pb-free)

–40

°C to 85°C

SSOP – DCT

Reel of 3000

SN74AUC2G80DCTR

U80_ _ _

VSSOP – DCU

Reel of 3000

SN74AUC2G80DCUR

UX_

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

• = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoFree is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 2004–2007, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.