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SN74ALVCH16832 Datasheet(PDF) 1 Page - Texas Instruments

Part No. SN74ALVCH16832
Description  1-TO-4 ADDRESS REGISTER/DRIVER WITH 3-STATE OUTPUTS
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Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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SN74ALVCH16832 Datasheet(HTML) 1 Page - Texas Instruments

 
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FEATURES
DESCRIPTION/ORDERING INFORMATION
DGG PACKAGE
(TOP VIEW)
NC − No internal connection
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4Y1
3Y1
GND
2Y1
1Y1
VCC
A1
GND
A2
GND
A3
VCC
NC
GND
CLK
OE1
OE2
SEL
GND
A4
A5
VCC
GND
A6
GND
A7
VCC
4Y7
3Y7
GND
2Y7
1Y7
1Y2
2Y2
GND
3Y2
4Y2
VCC
1Y3
2Y3
GND
3Y3
4Y3
GND
VCC
GND
1Y4
2Y4
3Y4
4Y4
GND
1Y5
2Y5
VCC
3Y5
4Y5
GND
GND
VCC
1Y6
2Y6
GND
3Y6
4Y6
SN74ALVCH16832
1-TO-4 ADDRESS REGISTER/DRIVER
WITH 3-STATE OUTPUTS
SCES098G – MAY 1997 – REVISED OCTOBER 2004
Member of the Texas Instruments
Widebus™ Family
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
This 1-bit to 4-bit address register/driver is designed
for 1.65-V to 3.6-V VCC operation. This device is ideal
for use in applications in which a single address bus
is driving four separate memory locations. The
SN74ALVCH16832 can be used as a buffer or a
register, depending on the logic level of the select
(SEL) input.
When SEL is a logic high, the device is in the buffer
mode. The outputs
follow
the
inputs
and
are
controlled by the two output-enable (OE) inputs. Each
OE controls two groups of seven outputs.
When SEL is a logic low, the device is in the register
mode. The register is an edge-triggered D-type
flip-flop. On the positive transition of the clock (CLK)
input, data at the A inputs is stored in the internal
registers. OE operates the same as in the buffer
mode.
When OE is a logic low, the outputs are in a normal
logic state (high or low logic level). When OE is a
logic high, the outputs are in the high-impedance
state.
Neither SEL nor OE affect the internal operation of
the flip-flops. Old data can be retained or new data
can be entered while the outputs are in the
high-impedance state.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
-40
°C to 85°C
TSSOP - DGG
Tape and reel
SN74ALVCH16832DGGR
ALVCH16832
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1997–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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