DP8440VLJ-40 datasheet(1/46 Pages) NSC

Part #	DP8440VLJ-40

Description	microCMOS Programmable 16/64 Mbit Dynamic RAM Controller/Driver

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Manufacturer	NSC [National Semiconductor (TI)]

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TLF11718

February 1995

DP8440-40DP8440-25DP8441-40DP8441-25

microCMOS Programmable 1664 Mbit

Dynamic RAM ControllerDriver

General Description

The DP844041 Dynamic RAM Controllers provide an easy

interface between dynamic RAM arrays and 8- 16- 32- and

64-bit microprocessors The DP844041 DRAM Controllers

generate all necessary control and timing signals to suc-

cessfully interface and design dynamic memory systems

With significant enhancements over the DP84202122

predecessors the DP844041 are suitable for high perform-

ance memory systems These controllers support page and

burst accesses for fast page static column and nibble

DRAMs Refreshes and accesses are arbitrated on chip

RAS low time during refresh and RAS precharge time are

guaranteed by these controllers Separate precharge coun-

ters for each RAS output avoid delayed back to back ac-

cesses due to precharge when using memory interleaving

Programmable features make the DP844041 DRAM Con-

trollers flexible enough to fit many memory systems

Features

Y

40 MHz and 25 MHz operation

Y

Page detection

Y

Automatic CPU burst accesses

Y

Support 141664 Mbits DRAMs

Y

High capacitance drivers for RAS CAS WE and Q out-

puts

Y

Support for fast page static column and nibble mode

DRAMs

Y

High precision PLL based delay line

Y

Byte enable for word size up to 32 bits on the DP8440

or 64 bits on the DP8441

Y

Automatic Internal Refresh

Y

Staggered RAS-Only refresh

Y

Burst and CAS-before-RAS refresh

Y

Error scrubbing during refresh

Y

TRI-STATE

outputs

Y

Easy interface to all major microprocessors

Block Diagram

TLF11718 – 1

FIGURE 1

TRI-STATE

is a registered trademark of National Semiconductor Corporation

C1995 National Semiconductor Corporation

RRD-B30M75Printed in U S A

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DP8440VLJ-40 Datasheet(PDF) 1 Page - National Semiconductor (TI)

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