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CAT809RSDI-T Datasheet(PDF) 7 Page - Catalyst Semiconductor |
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CAT809RSDI-T Datasheet(HTML) 7 Page - Catalyst Semiconductor |
7 / 13 page 7 CAT809, CAT810 Patent Pending Doc. No. 3004, Rev. S DETAILED DESCRIPTIONS RESET TIMING The reset signal is asserted LOW for the CAT809 and HIGH for the CAT810 when the power supply voltage falls below the threshold trip voltage and remains asserted for at least 140ms after the power supply voltage has risen above the threshold. VCC TRANSIENT RESPONSE The CAT809/810 protect µPs against brownout failure. Short duration transients of 4µsec or less and 100 mV amplitude typically do not cause a false RESET. Figure 2 shows the maximum pulse duration of negative-going VCC transients that do not cause a reset condition. As the amplitude of the transient goes further below the threshold (increasing VTH - VCC), the maximum pulse duration decreases. In this test, the VCC starts from an initial voltage of 0.5V above the threshold and drops below it by the amplitude of the overdrive voltage (VTH - VCC). 5V 0V 5V 0V 5V 0V CAT809 CAT810 Threshold Voltage 140ms minimum Reset Timeout Period Power Supply Voltage RESET RESET FIGURE 1. RESET TIMING DIAGRAM FIGURE 2. Maximum Transient Duration Without Causing a Reset Pulse vs. Reset Comparator Overdrive 30 25 20 15 10 5 0 RESET OVERDRIVE VTH - VCC [mV] 1 10 100 1000 TAMB = 25°C CAT809M CAT809Z |
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