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SN65LVDS117DGGR Datasheet(PDF) 6 Page - Texas Instruments

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Part # SN65LVDS117DGGR
Description  DUAL 4-PORT AND DUAL 8-PORT LVDS REPEATERS
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SN65LVDS117DGGR Datasheet(HTML) 6 Page - Texas Instruments

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SWITCHING CHARACTERISTICS
SN65LVDS109
SN65LVDS117
SLLS369F – AUGUST 1999 – REVISED FEBRUARY 2005
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN TYP(1)
MAX
UNIT
tPLH
Propagation delay time, low-to-high-level output
1.6
2.8
4.5
ns
tPHL
Propagation delay time, high-to-low-level output
1.6
2.8
4.5
tr
Differential output signal rise time
0.3
0.8
1.2
ns
tf
Differential output signal fall time
0.3
0.8
1.2
RL = 100 Ω, CL = 10 pF,
See Figure 4
tsk(p)
Pulse skew (|tPHL– tPLH|)(2)
140
500
ps
tsk(o)
Output skew(3)
100
550
tsk(b)
Bank skew(4)
40
150
ps
tsk(pp)
Part-to-part skew(5)
1.5
ns
tPZH
Propagation delay time, high-impedance-to-high-level output
5.7
15
tPZL
Propagation delay time, high-impedance-to-low-level output
7.7
15
See Figure 5
ns
tPHZ
Propagation delay time, high-level-to-high-impedance output
3.2
15
tPLZ
Propagation delay time, low-level-to-high-impedance output
3.2
15
(1)
All typical values are at 25
°C and with a 3.3-V supply.
(2)
tsk(p) is the magnitude of the time difference between the tPLH and tPHL of any output of a single device.
(3)
tsk(o) is the magnitude of the time difference between the tPLH or tPHL of any outputs with both inputs tied together.
(4)
tsk(b) is the magnitude of the time difference between the tPLH and tPHL of the two outputs of any bank of a single device.
(5)
tsk(pp) is the magnitude of the time difference in propagation delay times between any specified terminals of two devices when both
devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits.
6


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