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SN75LBC180ADG4 Datasheet(PDF) 6 Page - Texas Instruments |
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SN75LBC180ADG4 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 21 page  RECEIVER ELECTRICAL CHARACTERISTICS RECEIVER SWITCHING CHARACTERISTICS PARAMETER MEASUREMENT INFORMATION VOC VOD 27 Ω 27 Ω 0 or 3 V SN65LBC180A SN75LBC180A SLLS378D – MAY 2000 – REVISED APRIL 2009............................................................................................................................................................... www.ti.com over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP(1) MAX UNIT VIT+ Positive-going input threshold voltage IO = –8 mA 0.2 V VIT– Negative-going input threshold voltage IO = 8 mA –0.2 V Vhys Hysteresis voltage ( VIT+ – VIT–) 50 mV VIK Enable-input clamp voltage II = –18 mA –1.5 –0.8 V VOH High-level output voltage VID = 200 mV, IOH = –8 mA 4 4.9 V VOL Low-level output voltage VID = –200 mV, IOL = 8 mA 0.1 0.8 V IOZ High-impedance-state output current VO = 0 V to VCC –1 1 µA IIH High-level enable-input current VIH = 2.4 V –100 µA IIL Low-level enable-input current VIL = 0.4 V –100 µA VI = 12 V, 0.4 1 VCC = 5 V VI = 12 V, 0.5 1 VCC = 0 II Bus input current Other input at 0 V mA VI = –7 V, –0.8 –0.4 VCC = 5 V VI = –7 V, –0.8 –0.3 VCC = 0 Receiver enabled and driver disabled 4.5 7.5 VI = 0 or VCC, ICC Supply current Receiver disabled and driver disabled 0.5 1 mA No load Receiver enabled and driver enabled 8.5 15 (1) All typical values are at VCC = 5 V and TA = 25°C. over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tPLH Propagation delay time, low-to-high-level output 7 13 20 ns tPHL Propagation delay time, high-to-low-level output 7 13 20 ns VID = –1.5 V to 1.5 V, See Figure 7 tsk(p) Pulse skew ( | tPHL – tPLH | ) 0.5 1.5 ns tr Output signal rise time 2.1 3.3 ns tf Output signal fall time See Figure 7 2.1 3.3 ns tPZH Output enable time to high level 30 45 ns tPZL Output enable time to low level 30 45 ns CL = 10 pF, See Figure 8 tPHZ Output disable time from high level 20 40 ns tPLZ Output disable time from low level 20 40 ns Figure 1. Driver VOD and VOC 6 Submit Documentation Feedback Copyright © 2000–2009, Texas Instruments Incorporated Product Folder Link(s): SN65LBC180A SN75LBC180A |
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