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MC9S12A256B Datasheet(PDF) 57 Page - Freescale Semiconductor, Inc |
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MC9S12A256B Datasheet(HTML) 57 Page - Freescale Semiconductor, Inc |
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57 / 126 page  MC9S12DP256B Device User Guide — V02.15 59 2.3 Detailed Signal Descriptions 2.3.1 EXTAL, XTAL — Oscillator Pins EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived from the EXTAL input frequency. XTAL is the crystal output. PP6 KWP6 PWM6 SS2 — VDDX PERP/ PPSP Disabled Port P I/O, Interrupt, Channel 6 of PWM, SS of SPI2 PP5 KWP5 PWM5 MOSI2 — VDDX PERP/ PPSP Disabled Port P I/O, Interrupt, Channel 5 of PWM, MOSI of SPI2 PP4 KWP4 PWM4 MISO2 — VDDX PERP/ PPSP Disabled Port P I/O, Interrupt, Channel 4 of PWM, MISO2 of SPI2 PP3 KWP3 PWM3 SS1 — VDDX PERP/ PPSP Disabled Port P I/O, Interrupt, Channel 3 of PWM, SS of SPI1 PP2 KWP2 PWM2 SCK1 — VDDX PERP/ PPSP Disabled Port P I/O, Interrupt, Channel 2 of PWM, SCK of SPI1 PP1 KWP1 PWM1 MOSI1 — VDDX PERP/ PPSP Disabled Port P I/O, Interrupt, Channel 1 of PWM, MOSI of SPI1 PP0 KWP0 PWM0 MISO1 — VDDX PERP/ PPSP Disabled Port P I/O, Interrupt, Channel 0 of PWM, MISO2 of SPI1 PS7 SS0 — — — VDDX PERS/ PPSS Up Port S I/O, SS of SPI0 PS6 SCK0 — — — VDDX PERS/ PPSS Up Port S I/O, SCK of SPI0 PS5 MOSI0 — — — VDDX PERS/ PPSS Up Port S I/O, MOSI of SPI0 PS4 MISO0 ——— VDDX PERS/ PPSS Up Port S I/O, MISO of SPI0 PS3 TXD1 — — — VDDX PERS/ PPSS Up Port S I/O, TXD of SCI1 PS2 RXD1 — — — VDDX PERS/ PPSS Up Port S I/O, RXD of SCI1 PS1 TXD0 — — — VDDX PERS/ PPSS Up Port S I/O, TXD of SCI0 PS0 RXD0 — — — VDDX PERS/ PPSS Up Port S I/O, RXD of SCI0 PT[7:0] IOC[7:0] — — — VDDX PERT/ PPST Disabled Port T I/O, Timer channels Pin Name Funct. 1 Pin Name Funct. 2 Pin Name Funct. 3 Pin Name Funct. 4 Pin Name Funct. 5 Power Supply Internal Pull Resistor Description CTRL Reset State Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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