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WM8962B Datasheet(PDF) 40 Page - Wolfson Microelectronics plc |
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WM8962B Datasheet(HTML) 40 Page - Wolfson Microelectronics plc |
40 / 295 page WM8962 40 Rev 4.3 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R48 (30h) Additional Control (4) 14:12 MICDET_THR [2:0] 000 MICBIAS Current Detect Threshold (AVDD = 1.8V) 000 = 64uA 001 = 166uA 010 = 375uA 011 = 475uA 100 = 575uA 101 = 680uA 110 = 885uA 111 = 990uA Note that the value scales with AVDD. The value quoted is correct for AVDD=1.8V. 11:10 MICSHORT_THR [1:0] 00 MICBIAS Short Circuit Threshold (AVDD = 1.8V) 00 = 515uA 01 = 680uA 10 = 1050uA 11 = 1215uA Note that the value scales with AVDD. The value quoted is correct for AVDD=1.8V. 9 MICDET_ENA 0 MICBIAS Current and Short Circuit Detect Enable 0 = Disabled 1 = Enabled 7 MICDET_STS 0 MICBIAS Current Detection status 0 = Current Detect threshold not exceeded 1 = Current Detect threshold exceeded 6 MICSHORT_STS 0 MICBIAS Short Circuit status 0 = Short Circuit threshold not exceeded 1 = Short Circuit threshold exceeded Table 3 MICBIAS Current Detect MICBIAS CURRENT DETECT FILTERING The function of the filtering is to ensure that AC current spikes caused by ambient noise conditions near the microphone do not lead to incorrect signalling of the microphone insertion/removal status or the microphone hookswitch status. Digital filtering of the hookswitch status ensures that the MICBIAS Short Circuit detection event is only signalled if the MICSHORT_THR threshold condition has been met for 10 consecutive measurements. In a typical application, microphone insertion would be detected when the MICBIAS current exceeds the Current Detect threshold set by MICDET_THR. When the MICD_IRQ_POL interrupt polarity bit is set to 0, then microphone insertion detection will cause the MICD_EINT interrupt status register to be set. (See “Interrupts” for details of these register bits.) For detection of microphone removal, the MICD_IRQ_POL bit should be set to 1. When the MICD_IRQ_POL interrupt polarity bit is set to 1, then microphone removal detection will cause the MICD_EINT interrupt status register to be set. |
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