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SCAN921025 Datasheet(PDF) 8 Page - Texas Instruments |
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SCAN921025 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 27 page NRND SCAN921025, SCAN921226 SNLS148C – DECEMBER 2001 – REVISED APRIL 2013 www.ti.com ELECTRICAL CHARACTERISTICS (continued) Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter Conditions Min Typ Max Units SCAN CIRCUITRY DC SPECIFICATIONS, SERIALIZER AND DESERIALIZER (applies to SCAN pins as noted) VIH High Level Input Voltage VCC = 3.0 to 3.6V, pins TCK, TMS, TDI, and 2.0 VCC V TRST VIL Low Level Input Voltage VCC = 3.0 to 3.6V, pins TCK, TMS, TDI, and GND 0.8 V TRST VCL Input Clamp Voltage VCC = 3.0V, ICL = −18 mA, pins TCK, TMS, −0.85 −1.5 V TDI, and TRST IIH Input Current VCC = 3.6V, VIN = 3.6V, pins TCK, TMS, TDI, 1 +10 μA and TRST IIL Input Current VCC = 3.6V, VIN = 0.0V, TCK Input -10 -1 μA IILR Input Current VCC = 3.6V, VIN = 0V, pins TMS, TDI, and -20 -10 μA TRST VOH High Level Output Voltage VCC = 3.0V, IOH = −12 mA, TDO output 2.2 2.6 V VOL Low Level Output Voltage VCC = 3.0V, IOL = 12 mA, TDO output 0.3 0.5 V IOS Output Short Circuit Current VCC = 3.6V, VOUT = 0.0V, TDO output -15 -90 -120 mA IOZ TRI-STATE Output Current PWRDN or REN = 0.8V, VOUT = 0V or VCC −10 0 +10 μA SERIALIZER TIMING REQUIREMENTS FOR TCLK Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter Conditions Min Typ Max Units tTCP Transmit Clock Period 12.5 T 33.3 ns tTCIH Transmit Clock High Time 0.4T 0.5T 0.6T ns tTCIL Transmit Clock Low Time 0.4T 0.5T 0.6T ns tCLKT TCLK Input Transition Time 3 6 ns tJIT TCLK Input Jitter 150 ps (RMS) SERIALIZER SWITCHING CHARACTERISTICS Over recommended operating supply and temperature ranges unless otherwise specified. Symbol Parameter Conditions Min Typ Max Units tLLHT Bus LVDS Low-to-High RL = 27Ω 0.2 0.4 ns Transition Time CL=10pF to GND (1) See Figure 6 tLHLT Bus LVDS High-to-Low 0.25 0.4 ns Transition Time tDIS DIN (0-9) Setup to TCLK RL = 27Ω, 0 ns CL=10pF to GND tDIH DIN (0-9) Hold from 4.0 ns See Figure 9 TCLK tHZD DO ± HIGH to RL = 27Ω, 3 10 ns TRI-STATE Delay CL=10pF to GND (2) See Figure 10 tLZD DO ± LOW to TRI- 3 10 ns STATE Delay tZHD DO ± TRI-STATE to 5 10 ns HIGH Delay tZLD DO ± TRI-STATE to 6.5 10 ns LOW Delay tSPW SYNC Pulse Width RL = 27Ω 5*tTCP ns See Figure 12 tPLD Serializer PLL Lock Time 510*tTCP 513*tTCP ns tSD Serializer Delay RLLLHT = 27Ω, see Figure 13 tTCP+ 1.0 tTCP+ 2.5 tTCP+ 3.5 ns (1) tLLHT and tLHLT specifications are specified by design using statistical analysis. (2) Because the Serializer is in TRI-STATE mode, the Deserializer will lose PLL lock and have to resynchronize before data transfer. 8 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: SCAN921025 SCAN921226 |
Similar Part No. - SCAN921025_13 |
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Similar Description - SCAN921025_13 |
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