20 Block Diagram

TLF9357 – 2

FIGURE 1

30 Functional Description

The SNI consists of five main logical blocks

a) the oscillatorgenerates the 10 MHz transmit clock sig-

nal for system timing

b) the Manchester encoder and differential output driver

accepts NRZ data from the controller performs Man-

chester encoding and transmits it differentially to the

transceiver

c) the Manchester decoderreceives Manchester data

from the transceiver converts it to NRZ data and clock

pulses and sends them to the controller

d) the collision translatorindicates to the controller the

presence of a valid 10 MHz signal at its input

e) the loopback circuitrywhen asserted switches encod-

ed data instead of receive input signals to the digital

phase-locked loop

31 OSCILLATOR

The oscillator is controlled by a 20 MHz parallel resonant

crystal connected between X1 and X2 or by an external

clock on X1 The 20 MHz output of the oscillator is divided

by 2 to generate the 10 MHz transmit clock for the control-

ler The oscillator also provides internal clock signals to the

encoding and decoding circuits

Crystal Specification

Resonant frequency

20 MHz

Tolerance

g

0001% at 25 C

Stability

g

0005% 0 – 70 C

Type

AT-Cut

Circuit

Parallel Resonance

The 20 MHz crystal connection to the SNI requires special

care The IEEE 8023 standard requires a 001% absolute

accuracy on the transmitted signal frequency Stray capaci-

tance can shift the crystal’s frequency out of range causing

the transmitted frequency to exceed its 001% tolerance

The frequency marked on the crystal is usually measured

crystal’s data sheet This capacitance for 20 MHz crystals is

typically 20 pF The capacitance between the X1 and X2

pins of the SNI of the PC board traces and the plated

through holes plus any stray capacitance such as the sock-

et capacitance if one is used should be estimated or mea-

sured Once the total sum of these capacitances is deter-

mined the value of additional external shunt capacitance

required can be calculated This capacitor can be a fixed

5% tolerance component The frequency accuracy should

be measured during the design phase at the transmit clock

pin (TXC) for a given pc layout

Figure 2 shows the crystal

connection

TLF9357 – 3

a) SNI input capacitance between X1 and X2 (typically 5 pF)

b) PC board traces plated through holes socket capacitances

Note 1

When using a Viking (San Jose) VXB49N5 crystal the external ca-

capacitance of the DP8391A

FIGURE 2 Crystal Connection

32 MANCHESTER ENCODER AND DIFFERENTIAL

DRIVER

The encoder combines clock and data information for the

transceiver Data encoding and transmission begins with the

transmit enable input (TXE) going high As long as TXE re-

2