Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

AD0345AS8500RF Datasheet(PDF) 3 Page - Texas Instruments

Part No. AD0345AS8500RF
Description  RAD-TOLERANT CLASS-V FLOATING-POINT DIGITAL SIGNAL PROCESSOR
Download  61 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
Logo 

AD0345AS8500RF Datasheet(HTML) 3 Page - Texas Instruments

 
Zoom Inzoom in Zoom Outzoom out
 3 / 61 page
background image
Control
Logic
Test
’C67x CPU
Data Path B
B Register File
Program
Access/Cache
Controller
Instruction Fetch
Instruction Dispatch
Instruction Decode
Data Path A
A Register File
Data
Access
Controller
Power-
Down
Logic
.L1(1) .S1(1) .M1(1) .D1
.D2 .M2(1) .S2(1) .L2(1)
32
ROM/FLASH
SRAM
I/O Devices
16
Timer 0
Timer 1
External Memory
Interface (EMIF)
Multichannel
Buffered Serial
Port 0
Multichannel
Buffered Serial
Port 1
Direct Memory
Access Controller
(DMA)
(4 Channels)
Host Port
Interface
(HPI)
Internal Program Memory
1 Block Program/Cache
(64K Bytes)
Control
Registers
Internal Data
Memory
(64K Bytes)
2 Blocks of 8 Banks
Each
In-Circuit
Emulation
Interrupt
Control
Framing Chips:
H.100, MVIP,
SCSA, T1, E1
AC97 Devices,
SPI Devices,
Codecs
’C6701 Digital Signal Processor
PLL
(x1, x4)
SBSRAM
SDRAM
HOST CONNECTION
MC68360 Glueless
MPC860 Glueless
PCI9050 Bridge + Inverter
MC68302 + PAL
MPC750 + PAL
MPC960 (Jx/Rx) + PAL
SMJ320C6701-SP
www.ti.com
SGUS030F – APRIL 2000 – REVISED SEPTEMBER 2013
Device Characteristics
Table 1 provides an overview of the ’C6701 DSP. The table shows significant features of each device, including
the capacity of on-chip RAM, the peripherals, the execution time, and the package type with pin count.
Table 1. Characteristics of 'C6701 Processors
CHARACTERISTICS
DESCRIPTION
Device Number
SMJ320C6701
512K-bit Program Memory
On–Chip Memory
512K-bit Data Memory (organized as 2 blocks)
2 Mutichannel Buffered Serial Ports (McBSP)
2 General-Purpose Timers
Peripherals
Host-Port Interface (HPI)
External Memory Interface (EMIF)
Cycle Time
7 ns at 140 MHz
Package Type
27 mm × 27 mm, 429–Pin BGA (GLP) and 429-Pin LGA (ZMB)
1.9 V Core
Nominal Voltage
3.3 V I/O
Functional and CPU Block Diagram
(1)
These functional units execute floating-point instructions.
Copyright © 2000–2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: SMJ320C6701-SP


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn