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ADV7125 Datasheet(PDF) 2 Page - Analog Devices |
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ADV7125 Datasheet(HTML) 2 Page - Analog Devices |
2 / 12 page ![]() REV. 0 –2– ADV7125–SPECIFICATIONS (VAA = 5 V ± 5%, VREF = 1.235 V, RSET = 560 , CL = 10 pF. All specifications TMIN to TMAX 1, unless otherwise noted, T J MAX = 110 C.) Parameter Min Typ Max Unit Test Conditions 1 STATIC PERFORMANCE Resolution (Each DAC) 8 Bits Integral Nonlinearity (BSL) –1 ±0.4 +1 LSB Differential Nonlinearity –1 ±0.25 +1 LSB Guaranteed Monotonic DIGITAL AND CONTROL INPUTS Input High Voltage, VIH 2V Input Low Voltage, VIL 0.8 V Input Current, IIN –1 +1 µAVIN = 0.0 V or VDD PSAVE Pull-Up Current 20 µA Input Capacitance, CIN 10 pF ANALOG OUTPUTS Output Current 2.0 26.5 mA Green DAC, Sync = High Output Current 2.0 18.5 mA R/G/B DAC, Sync = Low DAC-to-DAC Matching 1.0 5 % Output Compliance Range, VOC 0 1.4 V Output Impedance, ROUT 100 k Ω Output Capacitance, COUT 10 pF IOUT = 0 mA Offset Error –0.025 +0.025 % FSR Tested with DAC Output = 0 V Gain Error 2 –5.0 +5.0 % FSR FSR = 18.62 mA VOLTAGE REFERENCE (Ext. and Int.) Reference Range, VREF 1.12 1.235 1.35 V POWER DISSIPATION Digital Supply Current 3 3.4 9 mA fCLK = 50 MHz Digital Supply Current3 10.5 15 mA fCLK = 140 MHz Digital Supply Current 3 18 25 mA fCLK = 240 MHz Analog Supply Current 67 72 mA RSET = 530 Ω Analog Supply Current 8 mA RSET = 4933 Ω Standby Supply Current 4 2.1 5.0 mA PSAVE = Low, Digital, and Control Inputs at VDD Power Supply Rejection Ratio 0.1 0.5 %/% NOTES 1Temperature range T MIN to TMAX: –40 °C to +85°C at 50 MHz and 140 MHz, 0°C to +70°C at 240 MHz and 330 MHz. 2Gain error = (Measured (FSC)/Ideal (FSC) –1) × 100), where Ideal = V REF/RSET × K × (FFH) × 4 and K = 7.9896. 3Digital supply is measured with continuous clock with data input corresponding to a ramp pattern and with an input level at 0 V and V DD. 4These max/min specifications are guaranteed by characterization in the 4.75 V to 5.25 V range. Specifications subject to change without notice. 5 V ELECTRICAL CHARACTERISTICS |
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