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DS99R103 Datasheet(PDF) 9 Page - Texas Instruments

Part # DS99R103
Description  3-40MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

DS99R103 Datasheet(HTML) 9 Page - Texas Instruments

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background image
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20%
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tCLH
Deserializer
8 pF
lumped
Single-ended
Signal
tCHL
DOUT+
DOUT-
24
DIN
RL
TCLK
Ideal Center Position (tBIT/2)
tBIT (1UI)
TxOUT_E_O
Ideal Data Bit
End
Ideal Data Bit
Beginning
tBIT(1/2UI)
tBIT(1/2UI)
23
2
1
0
START
BIT
STOP
BIT
SYMBOL N
23
2
1
0
START
BIT
STOP
BIT
SYMBOL N-1
23
2
1
0
START
BIT
STOP
BIT
SYMBOL N-2
23
2
1
0
START
BIT
STOP
BIT
SYMBOL N-3
23
2
1
0
STOP
BIT
SYMBOL N-4
DOUT0-23
DCA, DCB
TCLK
tSD
DIN
SYMBOL N+1
SYMBOL N
SYMBOL N+2
SYMBOL N+3
DS99R103, DS99R104
www.ti.com
SNLS241D – MARCH 2007 – REVISED APRIL 2013
Figure 8. Serializer Delay
Figure 9. Transmitter Output Eye Opening (TxOUT_E_O)
VOD = (DOUT+) – (DOUT -)
Differential output signal is shown as (DOUT+) – (DOUT -), device in Data Transfer mode.
Figure 10. Serializer VOD Diagram
Figure 11. Deserializer LVCMOS/LVTTL Output Load and Transition Times
Copyright © 2007–2013, Texas Instruments Incorporated
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Product Folder Links: DS99R103 DS99R104


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