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DS92LX1621 Datasheet(PDF) 5 Page - Texas Instruments |
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DS92LX1621 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 49 page 29 28 27 26 25 24 23 22 30 21 2 3 4 5 6 7 8 9 1 10 DS92LX1622 Deserializer 40-Pin WQFN PASS VDDCML RES RIN+ RIN- VDDPLL RES BISTEN RES M/S ROUT[4] ROUT[5] ROUT[6] ROUT[7] VDDOR2 ROUT[8] ROUT[9] VDDD ROUT[10] ROUT[11] DS92LX1621, DS92LX1622 www.ti.com SNLS327I – MAY 2010 – REVISED JANUARY 2014 DS92LX1622 PIN DIAGRAM Top View Figure 5. Deserializer - DS92LX1622 40-Pin WQFN (RTA Package) DS92LX1622 Deserializer PIN DESCRIPTIONS Pin Name Pin No. I/O, Type Description LVCMOS PARALLEL INTERFACE 9, 10, 11, 12, 14, 15, 17, 18, ROUT[13:0] Outputs, LVCMOS Parallel data outputs. 19, 20, 21, 22, 23, 24 HSYNC 7 Output, LVCMOS Parallel data output 14, typically used as Horizontal SYNC output VSYNC 6 Output, LVCMOS Parallel data output 14, typically used as Vertical SYNC output Pixel Clock Output Pin. PCLK 5 Output, LVCMOS Strobe edge set by RRFB control register General Purpose Input Output (GPIO) ROUT[3:0] / ROUT[3:0] general-purpose pins can be individually configured as either inputs 21, 22, 23, 24 Input/Output, Digital GPIO[5:2] or outputs; used to control and respond to various commands. General-purpose pins can be individually configured as either inputs or outputs; GPIO[1:0] 26, 27 Input/Output, Digital used to control and respond to various commands. SERIAL CONTROL BUS - I2C COMPATIBLE Clock line for the serial control bus communication SCL 3 Input/Output, Digital SCL requires an external pull-up resistor to VDDIO. Copyright © 2010–2014, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: DS92LX1621 DS92LX1622 |
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