NRND

DS90LT012AH

SNLS199A – SEPTEMBER 2005 – REVISED APRIL 2013

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APPLICATION INFORMATION

General application guidelines and hints for LVDS drivers and receivers may be found in the following application

notes: LVDS Owner's Manual(SNLA187), AN-808(SNLA028), AN-977(SNLA166), AN-971(SNLA165), AN-

916(SNLA219), AN-805(SNOA233), AN-903(SNLA034).

LVDS drivers and receivers are intended to be primarily used in an uncomplicated point-to-point configuration as

is shown in Figure 5. This configuration provides a clean signaling environment for the fast edge rates of the

drivers. The receiver is connected to the driver through a balanced media which may be a standard twisted pair

cable, a parallel pair cable, or simply PCB traces. Typically the characteristic impedance of the media is in the

range of 100

Ω. The internal termination resistor converts the driver output (current mode) into a voltage that is

detected by the receiver. Other configurations are possible such as a multi-receiver configuration, but the effects

of a mid-stream connector(s), cable stub(s), and other impedance discontinuities as well as ground shifting, noise

margin limits, and total termination loading must be taken into account.

The DS90LT012AH differential line receiver is capable of detecting signals as low as 100 mV, over a ±1V

common-mode range centered around +1.2V. This is related to the driver offset voltage which is typically +1.2V.

The driven signal is centered around this voltage and may shift ±1V around this center point. The ±1V shifting

may be the result of a ground potential difference between the driver's ground reference and the receiver's

ground reference, the common-mode effects of coupled noise, or a combination of the two. The AC parameters

of both receiver input pins are optimized for a recommended operating input voltage range of 0V to +2.4V

POWER DECOUPLING RECOMMENDATIONS

Bypass capacitors must be used on power pins. Use high frequency ceramic (surface mount is recommended)

0.1

μF and 0.001μF capacitors in parallel at the power supply pin with the smallest value capacitor closest to the

device supply pin. Additional scattered capacitors over the printed circuit board will improve decoupling. Multiple

vias should be used to connect the decoupling capacitors to the power planes. A 10

μF (35V) or greater solid

tantalum capacitor should be connected at the power entry point on the printed circuit board between the supply

and ground.

PC BOARD CONSIDERATIONS

Use at least 4 PCB board layers (top to bottom): LVDS signals, ground, power, TTL signals.

Isolate TTL signals from LVDS signals, otherwise the TTL signals may couple onto the LVDS lines. It is best to

put TTL and LVDS signals on different layers which are isolated by a power/ground plane(s).

Keep drivers and receivers as close to the (LVDS port side) connectors as possible.

DIFFERENTIAL TRACES

Use controlled impedance traces which match the differential impedance of your transmission medium (ie. cable)

and termination resistor. Run the differential pair trace lines as close together as possible as soon as they leave

the IC (stubs should be < 10mm long). This will help eliminate reflections and ensure noise is coupled as

common-mode. In fact, we have seen that differential signals which are 1mm apart radiate far less noise than

traces 3mm apart since magnetic field cancellation is much better with the closer traces. In addition, noise

induced on the differential lines is much more likely to appear as common-mode which is rejected by the

receiver.

Match electrical lengths between traces to reduce skew. Skew between the signals of a pair means a phase

difference between signals which destroys the magnetic field cancellation benefits of differential signals and EMI

in/ps). Do not rely solely on the autoroute function for differential traces. Carefully review dimensions to match

differential impedance and provide isolation for the differential lines. Minimize the number of vias and other

discontinuities on the line.

Avoid 90° turns (these cause impedance discontinuities). Use arcs or 45° bevels.

Within a pair of traces, the distance between the two traces should be minimized to maintain common-mode

rejection of the receivers. On the printed circuit board, this distance should remain constant to avoid

discontinuities in differential impedance. Minor violations at connection points are allowable.

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