1

2

3

4

5

6

7

8

9

A

Dx_SEL

VDD

DA0(n)

DA1(n)

DA2(n)

DA3(p)

DA3(n)

B

DC0(n)

DC0(p)

GND

DA0(p)

DA1(p)

DA2(p)

OE

DB0(p)

DB0(n)

C

AUX_SEL

GND

D

DC1(n)

DC1(p)

DB1(p)

DB1(n)

E

DC2(n)

DC2(p)

DB2(p)

DB2(n)

F

DC3(n)

DC3(p)

DB3(p)

DB3(n)

G

GND

GND

H

AUXC(n)

AUXC(p)

HPDB

GND

DDCCLK_B

AUXB(p)

GND

DDCCLK_A

AUXA(p)

J

HPDC

HPDA

DDCCLK_C

VDD

DDCDAT_B

AUXB(n)

DDCDAT_C DDCDAT_A

AUXA(n)

HD3SS215, HD3SS215I

SLAS971D – MAY 2014 – REVISED OCTOBER 2015

www.ti.com

5 Description (Continued)

One typical application would be a mother board that includes two GPUs that need to drive one DisplayPort sink.

The GPU is selected by the Dx_SEL pin. Another application is when one source needs to switch between one

of two sinks, such as a side connector an a docking station connector. The switching is controlled using the

Dx_SEL and AUX_SEL pins. The HD3SS215I operates from a single supply voltage of 3.3 V, over full industrial

temperature range –40°C to 85°C, in the ZQE package and 56 pin RTQ package.

6 Pin Configuration and Functions

50-Pin µBGA

ZQE Package

(Top View)

4

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