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ADF7020BCP Datasheet(PDF) 14 Page - Analog Devices |
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ADF7020BCP Datasheet(HTML) 14 Page - Analog Devices |
14 / 40 page ADF7020 Preliminary Technical Data Rev. PrH | Page 14 of 40 TRANSMITTER RF OUTPUT STAGE The PA of the ADF7020 is based on a single-ended, controlled current, open-drain amplifier that has been designed to deliver up to 13 dBm into a 50 Ω load at a maximum frequency of 928 MHz. The PA output current and, consequently, the output power are programmable over a wide range. The PA configurations in FSK/GFSK and ASK/OOK modulation modes are shown in Figure 11 and Figure 12, respectively. In FSK/GFSK modulation mode, the output power is independent of the state of the DATA_IO pin. In ASK/OOK modulation mode, it is dependent on the state of the DATA_IO pin and Bit R2_DB29, which selects the polarity of the TxData input. For each transmission mode, the output power can be adjusted as follows: • FSK/GFSK: The output power is set using bits R2_DB(9:14). • ASK: The output power for the inactive state of the TxData input is set by Bits R2_DB(15:20). The output power for the active state of the TxData input is set by Bits R2_DB(9:14). • OOK: The output power for the active state of the TxData input is set by Bits R2_DB(9:14). The PA is muted when the TxData input is inactive. IDAC 2 6 R2_DB(9:14) R2_DB4 R2_DB5 DIGITAL LOCK DETECT R2_DB(30:31) + RFGND RFOUT FROM VCO Figure 11. PA Configuration in FSK/GFSK Mode IDAC R2_DB(9:14) R2_DB(15:23) R2_DB4 R2_DB5 DIGITAL LOCK DETECT R2_DB(30:31) R2_DB29 + RFGND RFOUT FROM VCO 6 6 6 0 ASK/OOK MODE DATA I/O Figure 12. PA Configuration in ASK/OOK Mode The PA is equipped with overvoltage protection, which makes it robust in severe mismatch conditions. Depending on the application, one can design a matching network for the PA to exhibit optimum efficiency at the desired radiated output power level for a wide range of different antennas, such as loop or monopole antennas. See the LNA/PA Matching section for details. PA Bias Currents and Mute PA until Lock Bit Control Bits R2_DB(30:31) facilitate an adjustment of the PA bias current to further extend the output power control range, if necessary. If this feature is not required, the default value of 7 µA is recommended. The output stage is powered down by resetting Bit R2_DB4. To reduce the level of undesired spurious emissions, the PA can be muted during the PLL lock phase by setting Bit R2_DB5 (mute PA until lock bit). MODULATION SCHEMES Frequency Shift Keying (FSK) Frequency shift keying is implemented by setting the N value for the center frequency and then toggling this with the TxData line. The deviation from the center frequency is set using Bits R2_DB(15:23). The deviation from the center frequency in Hz is 14 2 Hz] [ Number Modulation PFD FSK DEVIATION × = where Modulation Number is a number from 1 to 511 (R2_DB(15:23)) . Select FSK using Bits R2_DB(6:8). VCO ÷N THIRD-ORDER Σ-∆ MODULATOR PFD/ CHARGE PUMP 4R INTEGER-N FRACTIONAL-N PA STAGE –FDEV +FDEV TxDATA FSK DEVIATION FREQUENCY Figure 13. FSK Implementation |
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