CY54FCT163T, CY74FCT163T

4-BIT BINARY COUNTERS

SCCS015A – MAY 1994 – REVISED OCTOBER 2001

6

POST OFFICE BOX 655303

electrical characteristics over recommended operating free-air temperature range (unless

otherwise noted)

PARAMETER

TEST CONDITIONS

CY54FCT163T

CY74FCT163T

UNIT

PARAMETER

TEST CONDITIONS

MIN

TYP†

MAX

MIN

TYP†

MAX

UNIT

#

VCC = 5.5 V,

Load mode,

One bit switching

at f1 = 5 MHz at

VIN ≤ 0.2 V or

VIN ≥ VCC – 0.2 V

0.7

1.4

#

Load mode,

f0 = 10 MHz,

1

50% duty cycle

VIN = 3.4 V or GND

1.2

3.4

#

0

Outputs open,

CEP = CET =

PE = GND,

Four bits

switching at

f1 = 5 MHz at

VIN ≤ 0.2 V or

VIN ≥ VCC – 0.2 V

1.6

3.2||

IC#

PE

GND,

SR = VCC

f1 = 5 MHz at

50% duty cycle

VIN = 3.4 V or GND

2.9

8.2||

mA

IC#

VCC = 5.25 V,

f0 = 10 MHz,

One bit switching

at f1 = 5 MHz at

VIN ≤ 0.2 V or

VIN ≥ VCC – 0.2 V

0.7

1.4

mA

f0 = 10 MHz,

Load mode,

1

50% duty cycle

VIN = 3.4 V or GND

1.2

3.4

Outputs open,

CEP = CET =

PE = GND,

Four bits

switching at

f1 = 5 MHz at

VIN ≤ 0.2 V or

VIN ≥ VCC – 0.2 V

1.6

3.2||

PE

GND,

SR = VCC

f1 = 5 MHz at

50% duty cycle

VIN = 3.4 V or GND

2.9

8.2||

Ci

5

10

5

10

pF

Co

9

12

9

12

pF

† Typical values are at VCC = 5 V, TA = 25°C.

# IC

= ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1)

Where:

IC

= Total supply current

ICC

= Power-supply current with CMOS input levels

∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V)

DH

= Duty cycle for TTL inputs high

NT

= Number of TTL inputs at DH

ICCD = Dynamic current caused by an input transition pair (HLH or LHL)

f0

= Clock frequency for registered devices, otherwise zero

f1

= Input signal frequency

N1

= Number of inputs changing at f1

All currents are in milliamperes and all frequencies are in megahertz.

|| Values for these conditions are examples of the ICC formula.

timing requirements over recommended operating free-air temperature range (unless otherwise

noted) (see Figure 1)

CY54FCT163T

CY74FCT163CT

UNIT

MIN

MAX

MIN

MAX

UNIT

t

Pulse duration high or low

Clock (load)

5

4

ns

tw

Pulse duration, high or low

Clock (count)

8

5

ns

P before CP

↑

5.5

3.5

tsu

Setup time, high or low

PE or SR before CP

↑

13.5

7.6

ns

CEP or CET before CP

↑

13

7.6

P after CP

↑

2

1.5

th

Hold time, high or low

PE or SR after CP

↑

1.5

1

ns

CEP or CET after CP

↑

0

0