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DS25CP102 Datasheet(PDF) 5 Page - Texas Instruments |
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DS25CP102 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 21 page DS25CP102 www.ti.com SNLS262E – OCTOBER 2007 – REVISED MARCH 2013 AC Electrical Characteristics (1) Over recommended operating supply and temperature ranges unless otherwise specified. (2) (3) Symbol Parameter Conditions Min Typ Max Units LVDS OUTPUT AC SPECIFICATIONS tPLHD Differential Propagation Delay Low to 365 500 ps High RL = 100Ω tPHLD Differential Propagation Delay High to 345 500 ps Low tSKD1 Pulse Skew |tPLHD − tPHLD| (4) 20 55 ps tSKD2 Channel to Channel Skew (5) 12 25 ps tSKD3 Part to Part Skew , (6) 50 150 ps tLHT Rise Time 65 120 ps RL = 100Ω tHLT Fall Time 65 120 ps tON Output Enable Time ENn = LH to output active 7 20 μs tOFF Output Disable Time ENn = HL to output inactive 5 12 ns tSEL Select Time SELn LH or HL to output 3.5 12 ns JITTER PERFORMANCE WITH EQ = Off, PE = Off (Figure 5) tRJ1 Random Jitter (RMS Value) VID = 350 mV 2.5 Gbps 0.5 1 ps No Test Channels VCM = 1.2V tRJ2 3.125 Gbps 0.5 1 ps (7) Clock (RZ) tDJ1 Deterministic Jitter (Peak to Peak) VID = 350 mV 2.5 Gbps 6 22 ps No Test Channels VCM = 1.2V tDJ2 3.125 Gbps 6 22 ps (8) K28.5 (NRZ) tTJ1 Total Jitter (Peak to Peak) VID = 350 mV 2.5 Gbps 0.03 0.08 UIP-P No Test Channels VCM = 1.2V tTJ2 3.125 Gbps 0.05 0.11 UIP-P (9) PRBS-23 (NRZ) JITTER PERFORMANCE WITH EQ = Off, PE = On (Figure 6, Figure 9) tRJ1B Random Jitter (RMS Value) VID = 350 mV 2.5 Gbps 0.5 1 ps Test Channel B VCM = 1.2V tRJ2B 3.125 Gbps 0.5 1 ps (7) Clock (RZ) tDJ1B Deterministic Jitter (Peak to Peak) VID = 350 mV 2.5 Gbps 3 12 ps Test Channel B VCM = 1.2V tDJ2B 3.125 Gbps 3 12 ps (8) K28.5 (NRZ) tTJ1B Total Jitter (Peak to Peak) VID = 350 mV 2.5 Gbps 0.03 0.06 UIP-P Test Channel B VCM = 1.2V tTJ2B 3.125 Gbps 0.04 0.09 UIP-P (9) PRBS-23 (NRZ) JITTER PERFORMANCE WITH EQ = On, PE = Off (Figure 7, Figure 9) tRJ1D Random Jitter (RMS Value) VID = 350 mV 2.5 Gbps 0.5 1 ps Test Channel D VCM = 1.2V tRJ2D 3.125 Gbps 0.5 1 ps (7) Clock (RZ) tDJ1D Deterministic Jitter (Peak to Peak) VID = 350 mV 2.5 Gbps 16 24 ps Test Channel D VCM = 1.2V tDJ2D 3.125 Gbps 12 24 ps (8) K28.5 (NRZ) (1) Specification is guaranteed by characterization and is not tested in production. (2) The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed. (3) Typical values represent most likely parametric norms for VCC = +3.3V and TA = +25°C, and at the Recommended Operation Conditions at the time of product characterization and are not guaranteed. (4) tSKD1, |tPLHD − tPHLD|, Pulse Skew, is the magnitude difference in differential propagation delay time between the positive going edge and the negative going edge of the same channel. (5) tSKD2, Channel to Channel Skew, is the difference in propagation delay (tPLHD or tPHLD) among all output channels in Broadcast mode (any one input to all outputs). (6) tSKD3, Part to Part Skew, is defined as the difference between the minimum and maximum differential propagation delays. This specification applies to devices at the same VCC and within 5°C of each other within the operating temperature range. (7) Measured on a clock edge with a histogram and an accumulation of 1500 histogram hits. Input stimulus jitter is subtracted geometrically. (8) Tested with a combination of the 1100000101 (K28.5+ character) and 0011111010 (K28.5- character) patterns. Input stimulus jitter is subtracted algebraically. (9) Measured on an eye diagram with a histogram and an accumulation of 3500 histogram hits. Input stimulus jitter is subtracted. Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: DS25CP102 |
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