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DRV8833CRTET Datasheet(PDF) 3 Page - Texas Instruments |
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DRV8833CRTET Datasheet(HTML) 3 Page - Texas Instruments |
3 / 29 page 1 2 3 4 12 11 10 9 AISEN AOUT2 BOUT2 BISEN VINT GND V M NC GND (PPAD) 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 GND (PPAD) AIN1 AIN2 VINT GND V M NC BIN2 BIN1 BOUT1 nFAULT BOUT2 BISEN AISEN AOUT2 AOUT1 nSLEEP DRV8833C www.ti.com SLVSCP9 – AUGUST 2014 5 Pin Configuration and Functions HTSSOP (PWP) QFN (RTE) 16 Pins 16 Pins Top View Top View Pin Functions PIN TYPE DESCRIPTION NAME PWP RTE POWER AND GROUND GND 13 11 PWR Device ground Both the GND pin and device PowerPAD must be connected to ground VINT 14 12 — Internal regulator (3.3 V) Internal supply voltage; bypass to GND with 2.2- μF, 6.3-V capacitor Connect to motor supply voltage; bypass to GND with a 10-µF VM 12 10 PWR Power supply (minimum) capacitor rated for VM CONTROL AIN1 16 14 I H-bridge A PWM input Controls the state of AOUT1 and AOUT2; internal pulldown AIN2 15 13 BIN1 9 7 I H-bridge B PWM input Controls the state of BOUT1 and BOUT2; internal pulldown BIN2 10 8 Logic high to enable device; logic low to enter low-power sleep mode; nSLEEP 1 15 I Sleep mode input internal pulldown STATUS Pulled logic low with fault condition; open-drain output requires an nFAULT 8 6 OD Fault indication pin external pullup OUTPUT Sense resistor to GND sets PWM current regulation level (see PWM AISEN 3 1 O Bridge A sense Motor Drivers) AOUT1 2 16 O Bridge A output Positive current is AOUT1 → AOUT2 AOUT2 4 2 Sense resistor to GND sets PWM current regulation level (see PWM BISEN 6 4 O Bridge B sense Motor Drivers) BOUT1 7 5 O Bridge B output Positive current is BOUT1 → BOUT2 BOUT2 5 3 Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: DRV8833C |
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