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CD54HC00 Datasheet(PDF) 1 Page - Texas Instruments

Part # CD54HC00
Description  High-Speed CMOS Logic Quad 2-Input NAND Gate
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CD54HC00 Datasheet(HTML) 1 Page - Texas Instruments

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Data sheet acquired from Harris Semiconductor
SCHS116C
Features
• Buffered Inputs
• Typical Propagation Delay: 7ns at VCC = 5V,
CL = 15pF, TA = 25
oC
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• Alternate Source is Philips/Signetics
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Description
The
CD54HC00,
CD74HC00,
CD54HCT00,
and
CD74HCT00
logic
gates
utilize
silicon
gate
CMOS
technology to achieve operating speeds similar to LSTTL
gates with the low power consumption of standard CMOS
integrated circuits. All devices have the ability to drive 10
LSTTL loads. The 74HCT logic family is functionally pin
compatible with the standard 74LS logic family.
Pinout
CD54HC00, CD54HCT00,
(CERDIP)
CD74HC00, CD74HCT00
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
CD54HC00F3A
-55 to 125
14 Ld CERDIP
CD54HCT00F3A
-55 to 125
14 Ld CERDIP
CD74HC00E
-55 to 125
14 Ld PDIP
CD74HC00M
-55 to 125
14 Ld SOIC
CD74HC00MT
-55 to 125
14 Ld SOIC
CD74HC00M96
-55 to 125
14 Ld SOIC
CD74HCT00E
-55 to 125
14 Ld PDIP
CD74HCT00M
-55 to 125
14 Ld SOIC
CD74HCT00MT
-55 to 125
14 Ld SOIC
CD74HCT00M96
-55 to 125
14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel
of 250.
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
1
2
3
4
5
6
7
14
13
12
11
10
9
8
January 1998 - Revised September 2003
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC00, CD74HC00,
CD54HCT00, CD74HCT00
High-Speed CMOS Logic
Quad 2-Input NAND Gate
[ /Title
(CD54
HC00,
CD54
HCT00
,
CD74
HC00,
CD74
HCT00
)
/Sub-


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