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XDM385AAR21F Datasheet(PDF) 7 Page - Texas Instruments |
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XDM385AAR21F Datasheet(HTML) 7 Page - Texas Instruments |
7 / 281 page DM385, DM388 www.ti.com SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. This revision history highlights the technical changes made to the document in the current revision. Revision History SEE ADDITIONS/MODIFICATIONS/DELETIONS Global Added notes specifying PCIe support on all DM385 devices and also on DM388 devices with PCIe enabled to: • Section 1.1, Features • Figure 1-1, Functional Block Diagram • Section 3.3.15, PCI Express (PCIe) Terminal Functions • Table 4-10, Pins Used in PCIe Bootmode • Section 8.16, Peripheral Component Interconnect Express (PCIe) • Figure 9-1, Device Nomenclature Added support for 4K x 2K resolution: • Section 1.3, Description • Section 2.6, HDVICP2 Overview • Section 8.12, Imaging Subsystem (ISS) Added notes specifying OPP100 is supported only on DM388 commercial temperature devices to: • Section 6.2, Recommended Operating Conditions • Section 6.3, Reliability Data • Section 7.2.2.1, Dynamic Voltage Frequency Scaling • Table 7-3, Device Operating Points (OPPs) • Table 7-4, Supported OPP Combinations Power, Reset, Changed OPP100 speed from 500 to 600 MHz for ARM Cortex-A8 in Table 7-3, Device Operating Points Clocking, and (OPPs). Interrupts Removed requirement that the maximum voltage difference between CVDD and any other CVDD_x voltage domain must be < 150 mV. • Table 7-4, Supported OPP Combinations Copyright © 2013, Texas Instruments Incorporated Contents 7 Submit Documentation Feedback Product Folder Links: DM385 DM388 |
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