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DAC8564B Datasheet(PDF) 3 Page - Texas Instruments |
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DAC8564B Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 51 page  DAC8564 www.ti.com SBAS403D – JUNE 2007 – REVISED MAY 2011 ELECTRICAL CHARACTERISTICS At AVDD = 2.7V to 5.5V and –40°C to +105°C range (unless otherwise noted). DAC8564 PARAMETER TEST CONDITIONS MIN TYP MAX UNIT STATIC PERFORMANCE(1) Resolution 16 Bits Measured by the line DAC8564A, DAC8564C ±4 ±12 LSB Relative accuracy passing through DAC8564B, DAC8564D ±4 ±8 LSB codes 485 and 64714 Differential nonlinearity 16-bit monotonic ±0.5 ±1 LSB Offset error ±5 ±8 mV Offset error drift ±1 μV/°C Measured by the line passing through codes 485 and 64714 Full-scale error ±0.2 ±0.5 % of FSR Gain error ±0.05 ±0.2 % of FSR AVDD = 5V ±1 ppm of Gain temperature coefficient FSR/ °C AVDD = 2.7V ±2 PSRR Power-supply rejection ratio Output unloaded 1 mV/V OUTPUT CHARACTERISTICS(2) Output voltage range 0 VREF V To ±0.003% FSR, 0200h to FD00h, RL = 2kΩ, 8 10 0pF < CL < 200pF Output voltage settling time μs RL = 2kΩ, CL = 500pF 12 Slew rate 2.2 V/ μs RL = ∞ 470 Capacitive load stability pF RL = 2kΩ 1000 Code change glitch impulse 1LSB change around major carry 0.15 nV-s Digital feedthrough SCLK toggling, SYNC high 0.15 nV-s Channel-to-channel dc crosstalk Full-scale swing on adjacent channel 0.25 LSB Channel-to-channel ac crosstalk 1kHz full-scale sine wave, outputs unloaded –100 dB DC output impedance At mid-code input 1 Ω Short-circuit current 50 mA Coming out of power-down mode, AVDD = 5V 2.5 Power-up time μs Coming out of power-down mode, AVDD = 3V 5 AC PERFORMANCE(2) SNR 90 dB THD –77 dB TA = +25°C, BW = 20kHz, VDD = 5V, fOUT = 1kHz. First 19 harmonics removed for SNR calculation. SFDR 78 dB SINAD 77 dB DAC output noise density TA = +25°C, at mid-code input, fOUT = 1kHz 120 nV/ √Hz DAC output noise TA = +25°C, at mid-code input, 0.1Hz to 10Hz 6 μVPP REFERENCE AVDD = 5.5V 360 μA Internal reference current consumption AVDD = 3.6V 348 μA External VREF = 2.5V, if internal reference is disabled, External reference current 80 μA all four channels active Reference input range VREFH voltage VREFL < VREFH, AVDD – (VREFH + VREFL) /2 > 1.2V 0 AVDD V Reference input range VREFL voltage VREFL < VREFH, AVDD – (VREFH + VREFL) /2 > 1.2V 0 AVDD/2 V Reference input impedance 31 k Ω (1) Linearity calculated using a reduced code range of 485 to 64714; output unloaded. (2) Ensured by design or characterization; not production tested. Copyright © 2007–2011, Texas Instruments Incorporated 3 |
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