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AM5726BABCXEA Datasheet(PDF) 8 Page - Texas Instruments |
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AM5726BABCXEA Datasheet(HTML) 8 Page - Texas Instruments |
8 / 415 page 8 AM5728, AM5726 SPRS953A – DECEMBER 2015 – REVISED JUNE 2016 www.ti.com Submit Documentation Feedback Product Folder Links: AM5728 AM5726 Device Comparison Copyright © 2015–2016, Texas Instruments Incorporated (1) In the Unified L3 memory map, there is maximum of 2GB of SDRAM space which is available to all L3 initiators including MPU (MPU, GPU, DSP, IVA, DMA, etc). Typically this space is interleaved across both EMIFs to optimize memory performance. If a system populates > 2GB of physical memory, that additional addressable space can be accessed only by the MPU via the ARM V7 Large Physical Address Extensions (LPAE). (2) IPU2 subsystem is dedicated to IVA support and is not available for other processing. (3) MLB power rails (vdds_mlbp) must be connected to a 1.8V power supply even this feature is not supported. (4) RTC only mode is not supported feature. 3.2 Related Products Sitara Processors Scalable processors based on ARM® Cortex®-A cores with flexible peripherals, connectivity & unified software support – perfect for sensors to servers. TI's ARM Cortex-A15 Advantage The ARM Cortex-A15 processor is proven in a range of different markets and is an increasingly popular choice in networking infrastructure, delivering high- performance processing capability combined with low power consumption. The Cortex-A15 processor delivers roughly twice the performance of the Cortex-A9 processor and can achieve 3.5 DMIPS/MHz. Sitara AM57x Processors Companion Products for AM572x Review products that are frequently purchased or used in conjunction with this product. |
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