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CC1020 Datasheet(PDF) 36 Page - Texas Instruments |
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CC1020 Datasheet(HTML) 36 Page - Texas Instruments |
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36 / 95 page  CC1020 SWRS046H – NOVEMBER 2006 – REVISED MARCH 2015 www.ti.com 5.9.9 AGC Settling After turning on the RX chain, the following occurs: A. The AGC waits 16 to 128 ADC_CLK (1.2288 MHz) periods, depending on the VGA_FREEZE setting in the VGA1 register, for settling in the analog parts. B. The AGC waits 16 to 48 FILTER_CLK periods, depending on the VGA_WAIT setting in the VGA1 register, for settling in the analog parts and the digital channel filter. C. The AGC calculates the RSSI value as the average magnitude over the next 2 to 16 FILTER_CLK periods, depending on the AGC_AVG setting in the VGA2 register. D. If the RSSI value is higher than CS_LEVEL+8, then the carrier sense indicator is set (if CS_SET = 0). If the RSSI value is too high according to the CS_LEVEL, VGA_UP and VGA_DOWN settings, and the VGA gain is not already at minimum, then the VGA gain is reduced and the AGC continues from B). E. If the RSSI value is too low according to the CS_LEVEL and VGA_UP settings, and the VGA gain is not already at maximum (given by VGA_SETTING), then the VGA gain is increased and the AGC continues from B). Two to three VGA gain changes should be expected before the AGC has settled. Increasing AGC_AVG increases the settling time, but may be worthwhile if there is the time in the protocol, and for reducing false wake-up events when setting the carrier sense close to the noise floor. The AGC settling time depends on the FILTER_CLK (= 2 × ChBW). Thus, there is a trade off between AGC settling time and receiver sensitivity because the AGC settling time can be reduced for data rates lower than 76.8 kBaud by using a wider receiver channel filter bandwidth (that is, larger ChBW). 5.9.10 Preamble Length and Sync Word The rules for choosing a good sync word are as follows: 1. The sync word should be significantly different from the preamble. 2. A large number of transitions is good for the bit synchronization or clock recovery. Equal bits reduce the number of transitions. The recommended sync word has at most 3 equal bits in a row. 3. Autocorrelation. The sync word should not repeat itself, as this will increase the likelihood for errors. 4. In general the first bit of sync should be opposite of last bit in preamble, to achieve one more transition. The recommended sync words for CC1020 are 2 bytes (0xD391), 3 bytes (0xD391DA) or 4 bytes (0xD391DA26) and are selected as the best compromise of the above criteria. Using the register settings provided by the SmartRFM Studio software, packet error rates (PER) less than 0.5% can be achieved when using 24 bits of preamble and a 16 bit sync word (0xD391). Using a preamble longer than 24 bits will improve the PER. When performing the PER measurements described above the packet format consisted of 10 bytes of random data, 2 bytes CRC and 1 dummy byte in addition to the sync word and preamble at the start of each package. For the test, 1000 packets were sent 10 times. The transmitter was put in power down between each packet. Any bit error in the packet, either in the sync word, in the data or in the CRC caused the packet to be counted as a failed packet. 36 Detailed Description Copyright © 2006–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: CC1020 |
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