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ADS7890IPFBTG4 Datasheet(PDF) 11 Page - Texas Instruments |
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ADS7890IPFBTG4 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 29 page ADS7890 SLAS409 − DECEMBER 2003 www.ti.com 11 2 3 9 2 3 15 16 D12 MSB-D13 MSB-D13 LSB-D0 Data From Last Conversion SCLK FS CS BUSY SDO Figure 9. Frame Abort Using CS Before Sample Start The rising edge of FS (see Figure 10) or rising edge of CS (see Figure 11) during a sample period (td8 after the 9th rising edge of SCLK) to the 16th falling edge of SCLK aborts the sample and the device enters the conversion phase, this also aborts the current data out operation on SDO (if aborted before 14th clock). As expected, SDO goes to three-state with CS high. The conversion results can be latched in the next frame, however reliability of the data depends on the sampling time available before the frame abort. MSB− D13 D12 LSB−D0 td8 2 3 9 10 16 SCLK FS BUSY CS SDO (Held Low) Figure 10. Frame Abort Using FS During Sample MSB− D13 D12 2 3 9 10 16 td8 SCLK FS BUSY CS SDO Figure 11. Frame Abort Using CS During Sample The rising edge of FS during a conversion (from BUSY high until the end of t(conv) as shown in Figure 12) aborts the ongoing conversion. This starts the next frame. The device outputs 3F80 (hex) on SDO during the first frame after the conversion abort. Toggling CS during a conversion (with FS low) does not have any effect on the conversion. |
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