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TPS54620 Datasheet(PDF) 27 Page - Texas Instruments

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Part No. TPS54620
Description  4.5-V to 17-V Input, 6-A Synchronous Step Down SWIFT Converter
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS54620 Datasheet(HTML) 27 Page - Texas Instruments

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Tss(ms) x Iss( A)
SLVS949E – MAY 2009 – REVISED JULY 2016
Product Folder Links: TPS54620
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Copyright © 2009–2016, Texas Instruments Incorporated
one 4.7 µF 25 V capacitors in parallel have been selected as the VIN and PVIN inputs are tied together so the
TPS54620 may operate from a single supply. The input capacitance value determines the input ripple voltage of
the regulator. The input voltage ripple can be calculated using Equation 27. Using the design example values,
Ioutmax = 6 A, Cin = 14.7 μF, Fsw=480 kHz, yields an input voltage ripple of 213 mV and a RMS input ripple
current of 2.95 A.
(27) Slow Start Capacitor Selection
The slow start capacitor determines the minimum amount of time it takes for the output voltage to reach its
nominal programmed value during power up. This is useful if a load requires a controlled voltage slew rate. This
is also used if the output capacitance is very large and would require large amounts of current to quickly charge
the capacitor to the output voltage level. The large currents necessary to charge the capacitor may make the
TPS54620 reach the current limit or excessive current draw from the input power supply may cause the input
voltage rail to sag. Limiting the output voltage slew rate solves both of these problems. The soft start capacitor
value can be calculated using Equation 28. For the example circuit, the soft start time is not too critical since the
output capacitor value is 47 μF which does not require much current to charge to 3.3 V. The example circuit has
the soft start time set to an arbitrary value of 3.5 ms which requires a 10 nF capacitor. In TPS54620, Iss is 2.3
uA and Vref is 0.8 V.
(28) Bootstrap Capacitor Selection
A 0.1 µF ceramic capacitor must be connected between the BOOT to PH pin for proper operation. It is
recommended to use a ceramic capacitor with X5R or better grade dielectric. The capacitor should have 10V or
higher voltage rating. Under Voltage Lockout Set Point
The Under Voltage Lock Out (UVLO) can be adjusted using the external voltage divider network of R3 and R4.
R3 is connected between VIN and the EN pin of the TPS54620 and R4 is connected between EN and GND .
The UVLO has two thresholds, one for power up when the input voltage is rising and one for power down or
brown outs when the input voltage is falling. For the example design, the supply should turn on and start
switching once the input voltage increases above 6.528V (UVLO start or enable). After the regulator starts
switching, it should continue to do so until the input voltage falls below 6.190 V (UVLO stop or disable).
Equation 2 and Equation 3 can be used to calculate the values for the upper and lower resistor values. For the
stop voltages specified the nearest standard resistor value for R3 is 35.7 k
Ω and for R4 is 8.06 kΩ. Output Voltage Feedback Resistor Selection
The resistor divider network R5 and R6 is used to set the output voltage. For the example design, 10 kΩ was
selected for R6. Using Equation 29, R5 is calculated as 31.25 kΩ. The nearest standard 1% resistor is 31.6 kΩ.
Minimum Output Voltage
Due to the internal design of the TPS54620, there is a minimum output voltage limit for any given input voltage.
The output voltage can never be lower than the internal voltage reference of 0.8 V. Above 0.8 V, the output
voltage may be limited by the minimum controllable on time. The minimum output voltage in this case is given by
Equation 30
VOUTmin = Ontimemin x ƒsmax (VINmax + IOUTmin (RDS2min - RDS1min)) - IOUTmin (RL + RDS2min)
VOUTmin = minimum achievable output voltage
Ontimemin = minimum controllable on-time (135 nsec maximum)
ƒsmax = maximum switching frequency including tolerance

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