74AC11160

SYNCHRONOUS 4BIT DECADE COUNTER

SCAS380 −D3199, AUGUST 1988 − REVISED APRIL 1993

POST OFFICE BOX 655303

4

output sequence

Illustrated below is the following sequence:

1. Clear outputs to zero (54AC11160 and 74AC11160 are synchronous)

2. Preset to BCD seven

3. Count to eight, nine, zero, one, two, and three

4. Inhibit.

CLR

LOAD

Data

Inputs

Outputs

QA

QB

QC

QD

78

9

CLK

D

C

B

A

Preset

ENP

ENT

RCO

Count

01

2

3

Async

Clear

Sync

Clear

Inhibit