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CY7B933-SC Datasheet(PDF) 8 Page - Cypress Semiconductor

Part # CY7B933-SC
Description  HOTLink??Transmitter/Receiver
Download  35 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7B933-SC Datasheet(HTML) 8 Page - Cypress Semiconductor

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CY7B923
CY7B933
8
CY7B923/CY7B933 Electrical Characteristics Over the Operating Range[1]
Parameter
Description
Test Conditions
Min.
Max.
Unit
TTL OUTs, CY7B923: RP; CY7B933: Q0−7, SC/D, RVS, RDY, CKR, SO
VOHT
Output HIGH Voltage
IOH = − 2 mA
2.4
V
VOLT
Output LOW Voltage
IOL = 4 mA
0.45
V
IOST
Output Short Circuit Current
VOUT =0V
[2]
−15
−90
mA
TTL INs, CY7B923: D0−7, SC/D, SVS, ENA, ENN, CKW, FOTO, BISTEN; CY7B933: RF, REFCLK, BISTEN
VIHT
Input HIGH Voltage
Com’l, Ind’l, & Mil
2.0
VCC
V
Ind’l & Mil (CKWandFOTO,only)
2.2
VCC
V
VILT
Input LOW Voltage
−0.5
0.8
V
IIHT
Input HIGH Current
VIN = VCC
−10
+10
µA
IILT
Input LOW Current
VIN = 0.0V
− 500
µA
Transmitter PECL-Compatible Output Pins: OUTA+, OUTA
−, OUTB+, OUTB−, OUTC+, OUTC−
VOHE
Output HIGH Voltage
(VCC referenced)
Load = 50
Ωto
VCC − 2V
Com’l
VCC−1.03
VCC−0.83
V
Ind’l & Mil
VCC−1.05
VCC−0.83
V
VOLE
Output LOW Voltage
(VCC referenced)
Load = 50
Ωto
VCC − 2V
Com’l
VCC−1.86
VCC−1.62
V
Ind’l & Mil
VCC−1.96
VCC−1.62
V
VODIF
Output Differential Voltage
|(OUT+)
− (OUT−)|
Load = 50 ohms to VCC − 2V
0.6
V
Receiver PECL-Compatible Input Pins: A/B, SI, INB
VIHE
Input HIGH Voltage
Com’l
VCC−1.165
VCC
V
Ind’l & Mil
VCC−1.14
VCC
V
VILE
Input LOW Voltage
Com’l
2.0
VCC−1.475
V
Ind’l & Mil
2.0
VCC−1.50
V
IIHE
[3]
Input HIGH Current
VIN = VIHE Max.
+500
µA
IILE
[3]
Input LOW Current
VIN = VILE Min.
+0.5
µA
Differential Line Receiver Input Pins: INA+, INA
−, INB+, INB−
VDIFF
Input Differential Voltage
|(IN+)
− (IN−)|
50
mV
VIHH
Highest Input HIGH Voltage
VCC
V
VILL
Lowest Input LOW Voltage
2.0
V
IIHH
Input HIGH Current
VIN = VIHH Max.
750
µA
IILL
[4]
Input LOW Current
VIN = VILL Min.
−200
µA
Miscellaneous
Typ.
Max.
ICCT
[5]
Transmitter Power Supply
Current
Freq. = Max.
Com’l
65
85
mA
Ind’l & Mil
75
95
mA
ICCR
[6]
Receiver Power Supply
Current
Freq. = Max.
Com’l
120
155
mA
Ind’l & Mil
135
160
mA
Notes:
1.
See the last page of this specification for Group A subgroup testing information.
2.
Tested one output at a time, output shorted for less than one second, less than 10% duty cycle.
3.
Applies to A/B only.
4.
Input currents are always positive at all voltages above VCC/2.
5.
Maximum ICCT is measured with VCC = Max., one PECL output pair loaded with 50 ohms to VCC − 2.0V, and other PECL outputs tied to VCC. Typical ICCT is measured with
VCC = 5.0V, TA = 25°C, one output pair loaded with 50 ohms to VCC − 2.0V, others tied to VCC, BISTEN = LOW. ICCT includes current into VCCQ (pin 9 and pin 22) only. Current
into VCCN is determined by PECL load currents, typically 30 mA with 50 ohms to VCC − 2.0V. Each additional enabled PECL pair adds 5 mA to ICCT and an additional load
current to VCCNas described.WhencalculatingthecontributionofPECL loadcurrents tochippowerdissipation,theoutputload current shouldbemultipliedby 1V insteadofVCC.
6.
Maximum ICCR is measured with VCC = Max., RF = LOW, and outputs unloaded. Typical ICCR is measured with VCC = 5.0V, TA = 25°C, RF = LOW, BISTEN = LOW, and
outputs unloaded. ICCR includes current into VCCQ (pins 21 and 24). Current into VCCN (pin 9) is determined by the total TTL output buffer quiescent current plus the sum of all
the load currents for each output pin. The total buffer quiescent current is 10mA max., and max. TTL load current for each output pin can be calculated as follows: Where
RL=equivalent load resistance, CL=capacitive load, and Fpin=frequency in MHz of data on pin. A derating factor of 1.1 has been included to account for worst
process corner and temperature condition.
I
I CCN
TTLPin
+
0.95) (
V
CCN
*5)*0.3
R
L
)
CL *
V
CCN
2
)1.5 *
Fpin *1.1


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