CY7C960
CY7C961
3
Functional Description (continued)
The CY7C960 controls a bridge between the VMEbus and lo-
cal DRAM and I/O. Once programmed, the CY7C960 provides
activities such as DRAM refresh and local I/O handshaking in
a manner that requires no additional local circuitry. The VME-
bus control signals are connected directly to the CY7C960.
The VMEbus address and data signals are connected to com-
panion address/data transceivers which are controlled by the
CY7C960. The CY7C964 VMEbus Interface Logic Circuit is an
ideal companion device: the CY7C964 provides a slice of data
and address logic that has been optimized for VME64 trans-
actions. In addition to providing the specified drive strength
and timing for VME64 transactions, the CY7C964 contains all
the circuitry needed to multiplex the address/data bus for mul-
tiplexed VMEbus transactions. It contains counters and latch-
es needed during BLT operations; and it also contains address
comparators which can be used in the board’s Slave Address
Decoder. For a 6U or 9U application, four CY7C964 devices
are controlled by a single CY7C960. For 3U applications, the
CY7C960 controls two CY7C964 devices and an address
latch.
The design of the CY7C960 makes it unnecessary to know the
details of the VMEbus transaction timing and protocol. The
complex VMEbus activities are translated by CY7C960 to sim-
ple local cycles involving a few familiar control signals. Similar-
ly, it is not necessary to understand the operation of the com-
panion device, CY7C964: all control sequences for the part are
generated automatically by the CY7C960 in response to VME-
bus or local activity. If more information is desired, consult the
CY7C964 chapter in the
VIC64 Design Notes (available sepa-
rately).
VMEbus transactions supported by the CY7C960 include D8,
D16, D32 (incl. UAT), MD32, D64, A16, A24, A32, A40, A64
single-cycle and block-transfer reads and writes, Read-Modi-
fy-Write cycles (incl. multiplexed), and Address-only (with or
without Handshake). The CY7C960 functions as a VMEbus
Interrupter, and supports the new Auto Slot ID standard and
CR/CSR space. The CY7C960 also handles LOCK cycles, al-
though full LOCK support is not possible within the constraints
of the CY7C960 pinout. Full LOCK support is provided by the
CY7C961.
On the local side, no CPU is needed to program the CY7C960,
nor to manage transactions. All programmable parameters are
initialized through the use of either the VMEbus, a serial PROM, or
some other local circuit. As the CY7C960 incorporates a reliable
power-on reset circuit, parameters are self-loaded by the device at
power-up or after a system reset. If the VMEbus is used to provide
parameters, a VMEbus Master provides the programming informa-
tion using a protocol, described in the User’s Guide, which is com-
pliant with the Auto Slot ID protocol from the new VME64 specifica-
tion.
Top View
TQFP
10099
97
98
96
2
3
1
42
41
59
60
61
12
13
15
14
16
4
5
40
39
95 94
17
26
9
10
8
7
6
11
27 28
30
29
31 32
35
34
3637 38
33
67
66
64
65
63
62
68
69
70
75
73
74
72
71
89 88
86
87
85
93 92
84
LA7
LA6
LA5
LD7
LA4
SELECTLM*
LAEN321
IRQ*
LA3
GND
AM5
VCC
LA1
NC
LACK*
LIRQ*
LDEN*
LD1
CS0
VCC
AM3
AM4
BERR*
GND
VMECNT
REGION2
REGION3/CS2
90
91
LBERR*
LA2
BBSY*
NC
VCC
LD2
CS1
NC
DS1*
NC
LWORD
FC1
LDS
DENIN1*
LAEN
LD0
CLK
NC
WRITE*
NC
REGION1
REGION0
DENIN*
18
19
20
21
22
23
24
25
83 82 81 80 79 78 77 76
58
57
56
55
54
53
52
51
43 44 4546 47 48 49 50
c960–4
CY7C961 Pin Configuration
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