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OKDY-T Datasheet(PDF) 24 Page - Murata Power Solutions Inc. |
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OKDY-T Datasheet(HTML) 24 Page - Murata Power Solutions Inc. |
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24 / 41 page  shutdown of the device. The device will continuously check for the presence of the fault condition, and if the fault condition no longer exists the device will be re-enabled. The load distribution should be designed for the maximum output short circuit current specified. The OCP limit and response of the product can be reconfigured using the PMBus interface. Initialization Procedure The product follows a specific internal initialization procedure after power is applied to the VIN pin: 1. Status of the address and output voltage pin-strap pins are checked and values associated with the pin settings are loaded to RAM. 2. Values stored in the Murata default non-volatile memory are loaded to RAM. This overwrites any previously loaded values. 3. Values stored in the user non-volatile memory are loaded to RAM. This overwrites any previously loaded values. Once the initialization process is completed, the product is ready to be enabled using the CTRL pin. The product is also ready to accept commands via the PMBus interface, which will overwrite any values loaded during the initialization procedure. Soft-start Power Up The soft-start control introduces a time-delay before allowing the output voltage to rise. Once the initialization time has passed the device will wait for the configured delay period prior to starting to ramp its output. After the delay period has expired, the output will begin to ramp towards its target voltage according to the configured soft-start ramp time. The default settings for the soft-start delay period and the soft- start ramp time is 10 ms. Hence, power-up is completed within 20 ms in default configuration using remote control. When the soft-start delay time is set to 0 ms, the module will begin its ramp-up after the internal circuitry has initialized (approximately 2 ms). It is generally recommended to set the soft-start ramp-up time to a value greater than 500 μs to prevent inadvertent fault conditions due to excessive inrush current. The acctual minimum ramp-up time will however normally be limited by the control loop settings and ramp-up times of internal interface voltages in the controller circuit to approximately 2 ms. The soft-start power up of the product can be reconfigured using the PMBus interface. aligning the output voltage of the slave devices to deliver the same current as the master device. Artificial droop resistance is added to the output voltage path to control the slope of the load line curve, calibrating out the physical parasitic mismatches due to power train components and PWB layout. Up to 7 devices can be configured in a given current sharing group. In order to avoid interference with other algorithms executing during parallel operation, the dead-time algorithm should be turned off and fixed dead-times be used. Phase Adding and Shedding for Parallel Operation During periods of light loading, it may be beneficial to disable one or more phases (modules) in order to eliminate the current drain and switching losses associated with those phases, resulting in higher efficiency. The product offers the ability to add and drop phases (modules) using a PMBus command in response to an observed load current change. All phases (modules) in a current share rail are considered active prior to the current sharing rail ramp to power-good. Phases can be dropped after power-good is reached. Any member of the current sharing rail can be dropped. If the reference module is dropped, the remaining active module with the lowest member posi- tion will become the new reference. Additionally, any change to the number of members of a current sharing rail will precipitate autono- mous phase distribution within the rail where all active phases realign their phase position based on their order within the number of active members. If the members of a current sharing rail are forced to shut down due to an observed fault, all members of the rail will attempt to re-start simultaneously after the fault has cleared. Efficiency Optimized Dead Time Control The product utilizes a closed loop algorithm to optimize the dead- time applied between the gate drive signals for the switch and synch FETs. The algorithm constantly adjusts the deadtime non-overlap to minimize the duty cycle, thus maximizing efficiency. This algorithm will null out deadtime differences due to component variation, tem- perature and loading effects. The algorithm can be configured via the PMBus interface. Over Current Protection (OCP) The product includes current limiting circuitry for protection at con- tinuous overload. The following OCP response options are available: 1. Initiate a shutdown and attempt to restart an infinite number of times with a preset delay period between attempts. 2. Initiate a shutdown and attempt to restart a preset number of times with a preset delay period between attempts. 3. Continue operating for a given delay period, followed by shutdown if the fault still exists. 4. Continue operating through the fault (this could result in perma- nent damage to the power supply). 5. Initiate an immediate shutdown. The default response from an over current fault is an immediate VIN CTRL VOUT time Delay Initialization time Ramp time Illustration of Power Up Procedure OKDx-T/50-W12-C 50A Digital PoL DC-DC Converter Series MDC_OKDx-T/50-W12-C.A04 Page 24 of 41 www.murata-ps.com/support |
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