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CY7C1049CV33
Document #: 38-05006 Rev. *C
Page 6 of 9
Write Cycle No. 1(WE Controlled, OE HIGH During Write)[15, 16]
Write Cycle No. 2 (WE Controlled, OE LOW)[16]
Notes:
14. Address valid prior to or coincident with CE transition LOW.
15. Data I/O is high-impedance if OE = VIH.
16. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
17. During this period the I/Os are in the output state and input signals should not be applied.
Switching Waveforms (continued)
tHD
tSD
tPWE
tSA
tHA
tAW
tSCE
tWC
tHZOE
DATAIN VALID
CE
ADDRESS
WE
DATA I/O
OE
NOTE 17
DATA VALID
tHD
tSD
tLZWE
tPWE
tSA
tHA
tAW
tSCE
tWC
tHZWE
CE
ADDRESS
WE
DATA I/O
NOTE 17