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TUSB3410 Datasheet(PDF) 3 Page - Texas Instruments

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Part No. TUSB3410
Description  USB TO SERIAL PORT CONTROLLER
Download  92 Pages
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

TUSB3410 Datasheet(HTML) 3 Page - Texas Instruments

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Contents
Section
Title
Page
1
Introduction
1–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1
Controller Description
1–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
Main Features
2–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1
USB Features
2–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2
General Features
2–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3
Enhanced UART Features
2–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4
Pinout Information
2–2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
Detailed Controller Description
3–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1
Operating Modes
3–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2
USB Interface Configuration
3–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.1
External Memory Case
3–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2.2
Host Download Case
3–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3
USB Data Movement
3–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4
Serial Port Setup
3–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5
Serial Port Data Modes
3–2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5.1
RS-232 Data Mode
3–2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5.2
RS-485 Data Mode
3–2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.5.3
IrDA Data Mode
3–2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
MCU Memory Map (Internal Operation)
4–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1
Miscellaneous Registers
4–2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1.1
ROMS: ROM Shadow Configuration Register
(Addr:FF90)
4–2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1.2
Boot Operation (MCU Firmware Loading)
4–2
. . . . . . . . . . . . . .
4.1.3
WDCSR: Watchdog Timer, Control, and Status Register
(Addr:FF93)
4–3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2
Buffers + I/O RAM Map
4–3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3
Endpoint Descriptor Block (EDB–1 to EDB–3)
4–5
. . . . . . . . . . . . . . . . . . .
4.3.1
OEPCNF_n: Output Endpoint Configuration (n = 1 to 3)
(Addr:FF08, FF10, FF18)
4–6
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.2
OEPBBAX_n: Output Endpoint X-Buffer Base Address
(n = 1 to 3)
4–6
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.3
OEPBCTX_n: Output Endpoint X Byte Count
(n = 1 to 3)
4–7
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.4
OEPBBAY_n: Output Endpoint Y-Buffer Base Address
(n = 1 to 3)
4–7
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.5
OEPBCTY_n: Output Endpoint Y-Byte Count
(n = 1 to 3)
4–7
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3.6
OEPSIZXY_n: Output Endpoint X-/Y-Buffer Size
(n =1 to 3)
4–8
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .


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