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TDA8922J Datasheet(PDF) 16 Page - NXP Semiconductors |
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TDA8922J Datasheet(HTML) 16 Page - NXP Semiconductors |
16 / 36 page 2003 Mar 20 16 Philips Semiconductors Objective specification 2 × 25 W class-D power amplifier TDA8922 16 APPLICATION INFORMATION 16.1 BTL application When using the power amplifier in a mono BTL application (for more output power), the inputs of both channels must be connected in parallel and the phase of one of the inputs must be inverted (see Fig.6). In principle the loudspeaker can be connected between the outputs of the two single-ended demodulation filters. 16.2 Pin MODE For correct operation the switching voltage at pin MODE should be debounced. If pin MODE is driven by a mechanical switch an appropriate debouncing low-pass filter should be used. If pin MODE is driven by an electronic circuit or microcontroller then it should remain at the mute voltage level for at least 100 ms before switching back to the standby voltage level. 16.3 Output power estimation The output power in several applications (SE and BTL) can be estimated using the following expressions: SE: Maximum current: should not exceed 4 A. BTL: Maximum current: should not exceed 4 A. Legend: RL = load impedance fosc = oscillator frequency tmin = minimum pulse width (typical 190 ns) VP = single-sided supply voltage (so, if supply is ±30 V symmetrical, then VP =30V) Po(1%) = output power just at clipping Po(10%) = output power at THD = 10% Po(10%) = 1.25 × Po(1%). 16.4 External clock The minimum required symmetrical supply voltage for external clock application is ±15 V (equally, the minimum asymmetrical supply voltage for applications with an external clock is 30 V). When using an external clock the following accuracy of the duty cycle of the external clock has to be taken into account: 47.5% < δ < 52.5%. A possible solution for an external clock oscillator circuit is illustrated in Fig.8. P o(1%) R L R L 0.6 + --------------------- V P 1t min f osc × – () × × 2 2R L × ------------------------------------------------------------------------------------------ = I o(peak) V P 1t min f osc × – () × R L 0.6 + ----------------------------------------------------- = P o(1%) R L R L 1.2 + --------------------- 2V P 1t min f osc × – () × × 2 2R L × --------------------------------------------------------------------------------------------- = I o(peak) 2V P 1t min f osc × – () × R L 1.2 + --------------------------------------------------------- = handbook, full pagewidth 1 14 7 2 11 13 10 4 5 6 89 12 3 CTC 0 − 0 + ASTAB − ASTAB + −TRIGGER +TRIGGER RETRIGGER MR 220 nF 5.6 V 4.3 V HOP GND MBL468 HEF4047BT VDD 360 kHz 320 kHz VDDA VSS 9.1 k Ω 2 k Ω 120 pF RTC CLOCK RCTC Fig.8 External oscillator circuit. |
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