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STK20C04 Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers

Part No. STK20C04
Description  CMOS nvSRAM High Performance 512 x 8 Nonvolatile Static RAM
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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STK20C04 Datasheet(HTML) 6 Page - List of Unclassifed Manufacturers

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STK20C04
2-44
HIGH IMPEDANCE
E
DQ (Data Out)
G
W
NE
31
tNLGL
30
tGLNH
33
tWHGL
34
tELGL
29
tGLQXR
RECALL CYCLES #1, #2 & #3
(VCC = 5.0V ± 10%)
#1
#2
Alt.
29
tNLQX
r
tELQXR
tGLQXR
RECALL Cycle Time
20
µs
30
tNLNH
s
tELNHR
tGLNH
RECALL Initiation Cycle Time
25
ns
31
tNLEL
tNLGL
NE Set-up
0ns
32
tGLNL
tGLEL
Output Enable Set-up
0
ns
33
tWHNL
tWHEL
tWHGL
t
Write Enable Set-up
0
ns
34
tELNL
tELGL
Chip Enable Set-up
0ns
35
tNLQZ
NE Fall to Outputs Inactive
25
ns
SYMBOLS
NO.
PARAMETER
MIN
MAX
UNITS
RECALL CYCLE #3: G CONTROLLEDo,t
HIGH IMPEDANCE
E
DQ (Data Out)
G
W
NE
31
tNLEL
32
tGLEL
33
tWHEL
30
tELNHR
29
tELQXR
RECALL CYCLE #2: E CONTROLLEDo
HIGH IMPEDANCE
DQ (Data Out)
NE
G
W
E
30
tNLNH
32
tGLNL
33
tWHNL
34
tELNL
35
tNLQZ
29
tNLQX
RECALL CYCLE #1: NE CONTROLLEDo
Note r: Measured with W and NE both high, and G and E low.
Note s: Once tNLNH has been satisfied by NE, G, W and E, the RECALL cycle is completed automatically. Any of NE, G or E may be used to terminate the
RECALL initiation cycle.
Note t: If W is low at any point in which both E and NE are low and G is high, then a
STORE cycle will be initiated instead of a RECALL.


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