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STK20C04 Datasheet(PDF) 4 Page - List of Unclassifed Manufacturers

Part No. STK20C04
Description  CMOS nvSRAM High Performance 512 x 8 Nonvolatile Static RAM
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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STK20C04 Datasheet(HTML) 4 Page - List of Unclassifed Manufacturers

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STK20C04
2-42
NO.
PARAMETER
UNITS
SYMBOLS
STK20C04-30
STK20C04-35
STK20C04-45
WRITE CYCLES #1 & #2
(VCC = 5.0V ± 10%)
Note f:
NE must be high during entire cycle.
Note i:
Measured
± 200mV from steady state output voltage.
Note k: E or W must be high during address transitions.
Note m: If W is low when E goes low, the outputs remain in the high impedance state.
12
tAVAVW
tAVAVW
tWC
Write Cycle Time
45
45
45
ns
13
tWLWH
tWLEH
tWP
Write Pulse Width
35
35
35
ns
14
tELWH
tELEH
tCW
Chip Enable to End of Write
35
35
35
ns
15
tDVWH
tDVEH
tDW
Data Set-up to End of Write
30
30
30
ns
16
tWHDX
tEHDX
tDH
Data Hold After End of Write
0
0
0
ns
17
tAVWH
tAVEH
tAW
Address Set-up to End of Write
35
35
35
ns
18
tAVWL
tAVEL
tAS
Address Set-up to Start of Write
0
0
0
ns
19
tWHAX
tEHAX
tWR
Address Hold After End of Write
0
0
0
ns
20
tWLQZ
i,m
tWZ
Write Enable to Output Disable
35
35
35
ns
21
tWHQX
tOW
Output Active After End of Write
5
5
5
ns
#1
#2
#3
MIN
MAX
MIN
MAX
MIN
MAX
PREVIOUS DATA
ADDRESS
E
W
DATA IN
DATA OUT
DATA VALID
HIGH IMPEDANCE
12
tAVAVW
14
tELWH
19
tWHAX
17
tAVWH
18
tAVWL
13
tWLWH
15
tDVWH
16
tWHDX
20
tWLQZ
21
tWHQX
WRITE CYCLE #1: W CONTROLLED f,k
WRITE CYCLE #2: E CONTROLLED f,k
ADDRESS
E
W
DATA IN
DATA OUT
HIGH IMPEDANCE
DATA VALID
12
tAVAVW
18
tAVEL
14
tELEH
19
tEHAX
17
tAVEH
13
tWLEH
15
tDVEH
16
tEHDX


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