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SN74LVC1T45 Datasheet(PDF) 16 Page - Texas Instruments |
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SN74LVC1T45 Datasheet(HTML) 16 Page - Texas Instruments |
16 / 22 page SN74LVC1T45 SINGLEBIT DUALSUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3STATE OUTPUTS SCES515E − DECEMBER 2003 − REVISED MAY 2004 16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION Figure 4 shows the SN74LVC1T45 being used in a bidirectional logic level-shifting application. Since the SN74LVC1T45 does not have an output enable (OE) pin, the system designer should take precautions to avoid bus contention between SYSTEM-1 and SYSTEM-2 when changing directions. 1 2 3 6 5 4 VCC1 VCC1 VCC2 SYSTEM-1 SYSTEM-2 DIR CTRL I/O-1 VCC2 I/O-2 Pullup/Down or Bus Hold† Pullup/Down or Bus Hold† Following is a sequence that illustrates data transmission from SYSTEM-1 to SYSTEM-2 and then from SYSTEM-2 to SYSTEM-1. STATE DIR CTRL I/O 1 I/O 2 DESCRIPTION 1 H OUT IN SYSTEM-1 data to SYSTEM-2 2 H HI-Z HI-Z SYSTEM-2 is getting ready to send data to SYSTEM-1. I/O-1 and I/O-2 are disabled. The bus-line state depends on pullup or pulldown.† 3 L HI-Z HI-Z DIR bit is flipped. I/O-1 and I/O-2 still are disabled. The bus-line state depends on pullup or pulldown.† 4 L OUT IN SYSTEM-2 data to SYSTEM-1 † SYSTEM-1 and SYSTEM-2 must use the same conditions, i.e., both pullup or both pulldown. Figure 4. Bidirectional Logic Level-Shifting Application enable times Calculate the enable times for the SN74LVC1T45 using the following formulas: 1. tPZH (DIR to A) = tPLZ (DIR to B) + tPLH (B to A) 2. tPZL (DIR to A) = tPHZ (DIR to B) + tPHL (B to A) 3. tPZH (DIR to B) = tPLZ (DIR to A) + tPLH (A to B) 4. tPZL (DIR to B) = tPHZ (DIR to A) + tPHL (A to B) In a bidirectional application, these enable times provide the maximum delay from the time the DIR bit is switched until an output is expected. For example, if the SN74LVC1T45 initially is transmitting from A to B, then the DIR bit is switched, the B port of the device must be disabled before presenting it with an input. After the B port has been disabled, an input signal applied to it appears on the corresponding A port after the specified propagation delay. |
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