HY29F002T datasheet(10/38 Pages) HYNIX

Part #	HY29F002T

Description	2 Megabit (256K x 8), 5 Volt-only, Flash Memory

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Manufacturer	HYNIX [Hynix Semiconductor]

Direct Link	http://www.skhynix.com/kor/main.do

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10 / 38 page

10

Rev. 4.1/May 01

HY29F002T

Notes:

1. Any number of Flash array read cycles are permitted.

2. Additional data cycles may follow. See text.

3. Any number of Electronic ID read cycles are permitted.

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Table 4. Composition of Command Sequences

A Read/Reset command must be issued in order

to read array data in the following cases:

n If the device is in the Electronic ID mode, a

Read/ Reset command must be written to re-

turn to the Read mode. If the device was in the

Erase Suspend mode when the device entered

the Electronic ID mode, writing the Read/Re-

set command returns the device to the Erase

Suspend mode.

Note: When in the Electronic ID bus operation mode,

the device returns to the Read mode when V

ID is re-

moved from the A[9] pin. The Read/Reset command is

not required in this case.

n If DQ[5] (Exceeded Time Limit) goes High dur-

ing a program or erase operation, writing the

reset command returns the sectors to the Read

mode (or to the Erase Suspend mode if the

device was in Erase Suspend).

The Read/Reset command may also be used to

abort certain command sequences:

n In a Sector Erase or Chip Erase command se-

quence, the Read/Reset command may be

written at any time before erasing actually be-

gins, including, for the Sector Erase command,

between the cycles that specify the sectors to

be erased (see Sector Erase command de-

scription). This aborts the command and re-

sets the device to the Read mode. Once era-

sure begins, however, the device ignores Read/

Reset commands until the operation is com-

plete.

n In a Program command sequence, the Read/

Reset command may be written between the

sequence cycles before programming actually

begins. This aborts the command and resets

the device to the Read mode, or to the Erase

Suspend mode if the Program command se-

quence is written while the device is in the

Erase Suspend mode. Once programming

begins, however, the device ignores Read/Re-

set commands until the operation is complete.

n The Read/Reset command may be written be-

tween the cycles in an Electronic ID command

sequence to abort that command. As described

above, once in the Electronic ID mode, the

Read/ Reset command must be written to re-

turn to the Read mode.

Byte Program Command

The host processor programs the device a byte at

a time by issuing the Program command sequence

shown in Table 5. The sequence begins by writ-

ing two unlock cycles, followed by the Program

setup command and, lastly, a data cycle specify-

ing the program address and data. This initiates

the Automatic Programming algorithm, which pro-

vides internally generated program pulses and

verifies the programmed cell margin. The host is

not required to provide further controls or timings

during this operation. When the Automatic Pro-

gramming algorithm is complete, the device re-

turns to the Read mode. Several methods are

provided to allow the host to determine the status

of the programming operation, as described in the

Write Operation Status section.

Commands written to the device during execution

of the Automatic Programming algorithm are ig-

nored. Note that a hardware reset immediately

terminates the programming operation. To en-

sure data integrity, the aborted program command

sequence should be reinitiated once the reset

operation is complete.

Programming is allowed in any sequence. Only

erase operations can convert a stored “0” to a “1”.

Thus, a bit cannot be programmed from a “0” back

to a “1”. Attempting to do so will set DQ[5] to “1”,

and the Data# Polling algorithm will indicate that

the operation was not successful. A Read/Reset

command or a hardware reset is required to exit

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