COP684BC datasheet(10/57 Pages) NSC

Part #	COP684BC

Description	8-Bit CMOS ROM Based Microcontrollers with 2k Memory, Comparators, and CAN Interface

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Manufacturer	NSC [National Semiconductor (TI)]

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Typical Performance Characteristics −55˚C ≤ T

A ≤ +125˚C (Continued)

Pin Descriptions

V

CC and GND are the power supply pins.

CKI is the clock input. The clock can come from a crystal os-

cillator (in conjunction with CKO). See Oscillator Description

section.

RESET is the master reset input. See Reset Description sec-

tion.

The device contains one bidirectional 8-bit I/O port (G), and

one 7-bit bidirectional I/O port (L) where each individual bit

may be independently configured as an input (Schmitt trig-

ger inputs on ports G and L), output or TRI-STATE® under

program control. Three data memory address locations are

allocated for each of these I/O ports. Each I/O port has two

associated 8-bit memory mapped registers, the CONFIGU-

RATION register and the output DATA register. A memory

mapped address is also reserved for the input pins of each

I/O port. (See the memory map for the various addresses as-

sociated with the I/O ports.)

Figure 5 shows the I/O port con-

figurations for the device. The DATA and CONFIGURATION

registers allow for each port bit to be individually configured

under software control as shown below:

Configuration

Data

Port Set-Up

Register

0

Hi-Z Input (TRI-STATE

Output)

0

1

Input with Weak Pull-Up

1

0

Push-Pull Zero Output

1

Push-Pull One Output

PORT L is a 7-bit I/O port. All L-pins have Schmitt triggers on

the inputs.

Port L supports Multi-Input Wake Up (MIWU) on all seven

pins.

Port L has the following alternate features:

L6 MIWU or CMP2OUT or PWM0 or CAPTIN

L5 MIWU or CMP2IN− or PWM1

L4 MIWU or CMP2IN+

L3 MIWU or CMP2IN−

L2 MIWU or CMP1OUT

L1 MIWU or CMP1IN−

L0 MIWU or CMP1IN+

Port G is an 8-bit port with 5 I/O pins (G0–G5), an input pin

(G6), and one dedicated output pin (G7). Pins G0–G6 all

have Schmitt Triggers on their inputs. G7 serves as the dedi-

cated output pin for the CKO clock output. There are two reg-

Idle I

DD vs VCC

DS012067-45

Halt Supply Current

DS012067-46

CAN Tx0 Sink Current

DS012067-47

CAN Tx1 Source Current

DS012067-48

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COP684BC Datasheet(PDF) 10 Page - National Semiconductor (TI)

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