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COP87L88CL Datasheet(PDF) 8 Page - National Semiconductor (TI) |
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COP87L88CL Datasheet(HTML) 8 Page - National Semiconductor (TI) |
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8 / 34 page  Reset (Continued) error will cause an active low error output on pin G1 This error output will continue until 16 – 32 tc clock cycles follow- ing the clock frequency reaching the minimum specified val- ue at which time the G1 output will enter the TRI-STATE mode The external RC network shown in Figure 4 should be used to ensure that the RESET pin is held low until the power supply to the chip stabilizes Note In continual state of reset the device will draw excessive current TLDD12524 – 6 RC l 5 c Power Supply Rise Time FIGURE 4 Recommended Reset Circuit Oscillator Circuits The chip can be driven by a clock input on the CKI input pin which can be between DC and 10 MHz The CKO output clock is on pin G7 (crystal configuration) The CKI input fre- quency is divided down by 10 to produce the instruction cycle clock (1tc) Figure 5 shows the Crystal and RC diagrams TLDD12524 – 7 FIGURE 5 Crystal and RC Oscillator Diagrams CRYSTAL OSCILLATOR CKI and CKO can be connected to make a closed loop crystal (or resonator) controlled oscillator Table I shows the component values required for various standard crystal values TABLE I Crystal Oscillator Configuration TA e 25 C R1 R2 C1 C2 CKI Freq Conditions (kX)(MX) (pF) (pF) (MHz) 0 1 30 30 – 36 10 VCC e 5V 0 1 30 30 – 36 4 VCC e 5V 0 1 200 100 – 150 0455 VCC e 5V RC OSCILLATOR By selecting CKI as a single pin oscillator input a single pin RC oscillator circuit can be connected to it CKO is avail- able as a general purpose input andor HALT restart pin Table II shows the variation in the oscillator frequencies as functions of the component (R and C) values TABLE II RC Oscillator Configuration TA e 25 C R C CKI Freq Instr Cycle Conditions (kX) (pF) (MHz) (ms) 33 82 22 – 27 37 – 46 VCC e 5V 56 100 11 – 13 74 – 90 VCC e 5V 68 100 09 – 11 88 – 108 VCC e 5V Note 3k s R s 200k 50 pF s C s 200 pF Control Registers CNTRL Register (Address X 00EE) The Timer1 (T1) and MICROWIREPLUS control register contains the following bits SL1 SL0 Select the MICROWIREPLUS clock divide by (00 e 2 01 e 4 1x e 8) IEDG External interrupt edge polarity select (0 e Rising edge 1 e Falling edge) MSEL Selects G5 and G4 as MICROWIREPLUS signals SK and SO respectively http www nationalcom 8 |
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