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COP87L84 Datasheet(PDF) 11 Page - National Semiconductor (TI) |
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COP87L84 Datasheet(HTML) 11 Page - National Semiconductor (TI) |
11 / 54 page Oscillator Circuits (Continued) CRYSTAL OSCILLATOR CKI and CKO can be connected to make a closed loop crys- tal (or resonator) controlled oscillator. Table 1 shows the component values required for various standard crystal values. TABLE 1. Crystal Oscillator Configuration, T A = 25˚C R1 R2 C1 C2 CKI Freq. Conditions (k Ω)(MΩ) (pF) (pF) (MHz) 0 1 30 30–36 10 V CC =5V 0 1 30 30–36 4 V CC =5V 0 1 200 100–150 0.455 V CC =5V Control Registers CNTRL Register (Address X'00EE) T1C3 T1C2 T1C1 T1C0 MSEL IEDG SL1 SL0 Bit 7 Bit 0 The Timer1 (T1) and MICROWIRE/PLUS control register contains the following bits: T1C3 Timer T1 mode control bit T1C2 Timer T1 mode control bit T1C1 Timer T1 mode control bit T1C0 Timer T1 Start/Stop control in timer modes 1 and 2, T1 Underflow Interrupt Pending Flag in timer mode 3 MSEL Selects G5 and G4 as MICROWIRE/PLUS signals SK and SO respectively IEDG External interrupt edge polarity select (0 = Rising edge, 1 = Falling edge) SL1 & SL0 Select the MICROWIRE/PLUS clock divide by (00 = 2, 01 = 4, 1x = 8) PSW Register (Address X'00EF) HC C T1PNDA T1ENA EXPND BUSY EXEN GIE Bit 7 Bit 0 The PSW register contains the following select bits: HC Half Carry Flag C Carry Flag T1PNDA Timer T1 Interrupt Pending Flag (Autoreload RA in mode 1, T1 Underflow in Mode 2, T1A capture edge in mode 3) T1ENA Timer T1 Interrupt Enable for Timer Underflow or T1A Input capture edge EXPND External interrupt pending BUSY MICROWIRE/PLUS busy shifting flag EXEN Enable external interrupt GIE Global interrupt enable (enables interrupts) The Half-Carry flag is also affected by all the instructions that affect the Carry flag. The SC (Set Carry) and R/C (Reset Carry) instructions will respectively set or clear both the carry flags. In addition to the SC and R/C instructions, ADC, SUBC, RRC and RLC instructions affect the Carry and Half Carry flags. ICNTRL Register (Address X'00E8) Reserved LPEN T0PND T0EN µWPND µWEN T1PNDB T1ENB Bit 7 Bit 0 The ICNTRL register contains the following bits: Reserved This bit is reserved and must be zero. LPEN L Port Interrupt Enable (Multi-Input Wakeup/ Interrupt) T0PND Timer T0 Interrupt pending T0EN Timer T0 Interrupt Enable (Bit 12 toggle) µWPND MICROWIRE/PLUS interrupt pending µWEN Enable MICROWIRE/PLUS interrupt T1PNDB Timer T1 Interrupt Pending Flag for T1B cap- ture edge T1ENB Timer T1 Interrupt Enable for T1B Input cap- ture edge Timers The device contains a very versatile set of timers (T0, T1, and an 8-bit PWM timer). All timers and associated autoreload/capture registers power up containing random data. Figure 8 shows a block diagram for timers T1 and T0 on the device. TIMER T0 (IDLE TIMER) The device supports applications that require maintaining real time and low power with the IDLE mode. This IDLE mode support is furnished by the IDLE timer T0, which is a 16-bit timer. The Timer T0 runs continuously at the fixed rate of the instruction cycle clock, t c. The user cannot read or write to the IDLE Timer T0, which is a count down timer. The Timer T0 supports the following functions: Exit out of the Idle Mode (See Idle Mode description) Start up delay out of the HALT mode The IDLE Timer T0 can generate an interrupt when the thir- teenth bit toggles. This toggle is latched into the T0PND pending flag, and will occur every 4.096 ms at the maximum clock frequency (t c = 1 µs). A control flag T0EN allows the in- terrupt from the thirteenth bit of Timer T0 to be enabled or disabled. Setting T0EN will enable the interrupt, while reset- ting it will disable the interrupt. TIMER T1 The device has a powerful timer/counter block, T1. The timer block consists of a 16-bit timer, T1, and two sup- porting 16-bit autoreload/capture registers, R1A and R1B. The timer block has two pins associated with it, T1A and T1B. The pin T1A supports I/O required by the timer block, DS101137-7 FIGURE 7. Crystal Oscillator Diagram www.national.com 11 |
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