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24C64 Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers

Part No. 24C64
Description  CMOS I²C 2-WIRE BUS 64K ELECTRICALLY ERASABLE PROGRAMMABLE ROM 8K X 8 BIT EEPROM
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Maker  ETC [List of Unclassifed Manufacturers]
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24C64 Datasheet(HTML) 6 Page - List of Unclassifed Manufacturers

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24C64
Turbo IC, Inc.
SDA LINE
DEVICE
ADDRESS
DATA n
S
T
O
P
N
O
A
C
K
A
C
K
A
C
K
M
S
B
L
S
B
R
/
W
A
C
K
S
T
A
R
T
W
R
I
T
E
//
//
R
E
A
D
DEVICE
ADDRESS
WORD
ADDRESS N
DUMMY WRITE
Random Read
Current Address Read
CURRENT ADDRESS READ:
The internal memory address counter of the Turbo IC 24C64
contains the last memory address accessed during the pre-
vious read or write operation, incremented by one. To start
the current address read operation, the master issues a start
condition, followed by the device address byte 1010 (A2) (A1)
(A0) 1. The Turbo IC 24C64 responds with an acknowledge
by pulling the SDA bus low, and then serially shifts out the
data byte accessed from memory at the location correspond-
ing to the memory address counter. The master does not
acknowledge, then sends a stop condition to terminate the
read operation. It is noted that the memory address counter
is incremented by one after the data byte is shifted out.
RANDOM ADDRESS READ:
The master starts with a dummy write operation (one with no
data bytes) to load the internal memory address counter by
first issuing a start condition, followed by the device address
byte 1010 (A2) (A1) (A0) 0, followed by the 2 memory ad-
dress bytes. Following the acknowledge from the Turbo IC
24C64, the master starts the current read operation by issu-
ing a start condition, followed by the device address byte
1010 (A2) (A1) (A0) 1. The Turbo IC 24C64 responds with
an acknowledge by pulling the SDA bus low, and then seri-
ally shifts out the data byte accessed from memory at the
location corresponding to the memory address counter. The
master does not acknowledge, then sends a stop condition
to terminate the read operation. It is noted that the memory
address counter is incremented by one after the data byte is
shifted out.
SEQUENTIAL READ:
The sequential read is initiated by either a current address
read or random address read. After the Turbo IC 24C64 seri-
ally shifts out the first data byte, the master acknowledges
by pulling the SDA bus low, indicating that it requires addi-
tional data bytes. After the data byte is shifted out, the Turbo
IC 24C64 increments the memory address counter by one.
Then the Turbo IC 24C64 shifts out the next data byte. The
sequential reads continues for as long as the master keeps
acknowledging. When the memory address counter is at the
last memory location, the counter will ‘roll-over’ when
incremented by one to the first location in memory (address
zero). The master terminates the sequential read operation
by not acknowledging, then sends a stop condition.
SDA LINE
DEVICE
ADDRESS
S
T
O
P
N
O
A
C
K
M
S
B
L
S
B
R
/
W
A
C
K
S
T
A
R
T
R
E
A
D
M
S
B
DATA
6


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