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TLV5631 Datasheet(PDF) 4 Page - Texas Instruments |
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TLV5631 Datasheet(HTML) 4 Page - Texas Instruments |
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www.ti.com ELECTRICAL CHARACTERISTICS TLV5630 TLV5631 TLV5632 SLAS269D – MAY 2000 – REVISED MARCH 2004 over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER SUPPLY Fast 16 21 No load, All inputs = DVDD or GND, IDD Power supply current mA Vref = 2.048 V, Slow 6 8 Power-down supply 0.1 µA current POR Power on threshold 2 V Power supply rejection PSRR Full scale, See (1) 50 dB ratio STATIC DAC SPECIFICATIONS TLV5630 12 Bits Resolution TLV5631 10 Bits TLV5632 8 Bits TLV5630 Code 40 to 4095 ±2 ±6 LSB INL Integral nonlinearity TLV5631 Vref = 1 V, 2 V Code 20 to 1023 ±0.5 ±2 LSB TLV5632 Code 6 to 255 ±0.3 ±1 LSB TLV5630 Code 40 to 4095 ±0.5 ±1 LSB DNL Differential nonlinearity TLV5631 Vref = 1 V, 2 V Code 20 to 1023 ±0.1 ±1 LSB TLV5632 Code 6 to 255 ±0.1 ±1 LSB Zero scale error (offset error at zero EZS ±30 mV scale) Zero scale error temperature coef- EZS TC 30 µV/ °C ficient %Full EG Gain error ±0.6 Scale V EGTC Gain error temperature coefficient 10 ppm/ °C OUTPUT SPECIFICATIONS VO Voltage output range RL = 10 kΩ 0 AVDD-0.4 V Output load regulation %Full RL = 2 kΩ vs 10 kΩ ±0.3 accuracy Scale V REFERENCE OUTPUT VREFOU Low reference voltage VDD > 4.75 V 1.010 1.024 1.040 V TL VREFOU High reference voltage 2.020 2.048 2.096 V TH Iref(Sourc Output source current 1 mA e) Iref(Sink) Output sink current -1 mA Load capacitance See (2) 1 10 µF Power supply rejection PSRR 60 dB ratio REFERENCE INPUT VI Input voltage range 0 AVDD V RI Input resistance 50 k Ω Ci Input capacitance 10 pF Fast 2.2 MHz Reference input Vref = 0.4 Vpp + 2.048 Vdc, bandwidth Input code = 0x800 Slow 1.9 MHz (1) Power supply rejection ratio at full scale is measured by varying AVDD and is given by: PSRR = 20 log [(EG(AVDDmax) - EG(AVDDmin))/VDDmax] (2) In parallel with a 100-nF capacitor 4 |
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