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SA1110 Datasheet(PDF) 91 Page - Intel Corporation

Part # SA1110
Description  Intel StrongARM SA-1110 Microprocessor
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Manufacturer  INTEL [Intel Corporation]
Direct Link  http://www.intel.com
Logo INTEL - Intel Corporation

SA1110 Datasheet(HTML) 91 Page - Intel Corporation

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SA-1110 Developer’s Manual
9-21
System Control Module
9.3.5.2
RTTR Value Calculations
After the true frequency of the oscillator is known, it must be split into integer and fractional
portions. The integer portion of the value (minus one) is loaded into the C0-C15 field of the RTTR.
This value is compared against a 16-bit counter clocked by the output of the 32.768-kHz oscillator.
The counter resets and generates a pulse when the two values are equal. This pulse constitutes the
raw 1-Hz signal.
The fractional part of the adjustment is done by periodically deleting clocks from the clock stream
feeding the integer counter. The period, called the "trim interval," is hard–wired to be 210 -1
seconds (approximately 17 minutes). The number of clocks deleted, called the "trim delete value,"
is a 10-bit programmable counter allowing from 0 to 210 -1 32-kHz clocks to be deleted from the
input clock stream once per trim interval. D0-D9 represents the number of clocks deleted per trim
operation. In summary, every 210 -1 seconds, the integer counter stops clocking for a period equal
to the fractional error that has accumulated. If this counter is programmed to a zero (as it is at a
hard reset), then no trim operations will occur and the RTC will be clocked with the raw
32.768-kHz clock. The relationship between the nominal 1-Hz clock frequency and the nominal
32.768-kHz clock (f1 and f32K respectively) is shown in the following equation.
Trim Example #1 – Measured Value Has No Fractional Component
In this example, the oscillator output is measured to be 36045.000 cycles/s (Hz). This output is
exactly 3277 cycles over the nominal frequency of the crystal and has no fractional component. As
such, only the integer trim function is needed and no fractional trim is required. Accordingly, the
C0-C15 field of the RTTR is loaded with the binary equivalent of 36045-1, or 0x8CCC. The
D0-D9 field is left at zero (power-up state) to disable fractional trimming. This trim exercise leaves
an error of zero in trimming.
Trim Example #2 – Measured Value Has a Fractional Component
This example is a more common case in that the measured frequency of the oscillator has a
fractional component. If the oscillator output is measured to be 32768.92 cycles/s (Hz), an integer
trim is necessary so that the average number of cycles counted before generating one 1-Hz clock is
32768.92. Similar to the previous example, the integer field D0-D15 is loaded with the
hexadecimal equivalent of 32768-1 or 0x7FFF.
Because the actual clock frequency is 0.92 cycles per second faster than the integer value, the 1-Hz
clock generated by just the integer trimming is slightly faster than needed and must be slowed
down. Accordingly, the fractional trim must be programmed to delete 0.92 cycles per second on
average to bring the 1-Hz output frequency down to the proper value. Since the trimming
procedure is performed only every 2
10-1=1023 seconds, the trim must be set to delete (.92*1023)
= 941.16 clocks every 1023 seconds. The fractional component of this value cannot be trimmed
out and constitutes the error in trimming, described below. The counter should be loaded with the
hexadecimal equivalent of 941, or 0x3AD.
f1=
(2^10-1)*(C 15..0 +1) -D 9..0
(2^10-1)*(C 15..0 +1)
*
f32k
(C 15..0 +1)


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