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CLC425 Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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CLC425 Datasheet(HTML) 5 Page - National Semiconductor (TI) |
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5 / 9 page  Introduction The CLC425 is a very wide gain-bandwidth, ultra-low noise voltage feedback operational amplifier which en- ables application areas such as medical diagnostic ultra- sound, magnetic tape & disk storage and fiber-optics to achieve maximum high-frequency signal-to-noise ratios. The set of characteristic plots located in the "Typical Performance" section illustrates many of the perfor- mance trade-offs. The following discussion will enable the proper selection of external components in order to achieve optimum device performance. Bias Current Cancellation In order to cancel the bias current errors of the non- inverting configuration, the parallel combination of the gain-setting (Rg) and feedback (Rf) resistors should equal the equivalent source resistance (Rs eq) as defined in Figure 1. Combining this constraint with the non-invert- ing gain equation also seen in Figure 1, allows both Rf and Rg to be determined explicitly from the following equations: Rf=AvRs eq and Rg=Rf/(Av-1). When driven from a 0 Ω source, such as that from the output of an op amp, the non-inverting input of the CLC425 should be isolated with at least a 25 Ω series resistor. As seen in Figure 2, bias current cancellation is accom- plished for the inverting configuration by placing a resis- tor (Rb) on the non-inverting input equal in value to the resistance seen by the inverting input (Rf||(Rg+Rs)). Rb is recommended to be no less than 25 Ω for best CLC425 performance. The additional noise contribution of Rb can be minimized through the use of a shunt capacitor. 4 16 4 21 25 kT e Joules C =− ° . @ Rf 3 2 4 7 6 Rg 0.1 µF 0.1 µF 6.8 µF 6.8 µF -Vcc +Vcc Vout RT Rs eq = Rs || RT Rf Rg Av = 1 + Vs Vin Rs CLC425 Rf Rg CLC425 Rs eq en in+ in- √4kTRg √4kTRf √4kTRs eq Total Input Noise vs. Source Resistance In order to determine maximum signal-to-noise ratios from the CLC425, an understanding of the interaction between the amplifier's intrinsic noise sources and the noise arising from its external resistors is necessary. Figure 3 describes the noise model for the non-inverting amplifier configuration showing all noise sources. In addition to the intrinsic input voltage noise (en) and current noise (in=in+=in-) sources, there also exists ther- mal voltage noise (e 4TR t = k ) associated with each of the external resistors. Equation 1 provides the general form for total equivalent input voltage noise density (eni). Equation 2 is a simplification of Equation 1 that assumes Rf||Rg = Rs eq for bias current cancellation. Figure 4 illustrates the equivalent noise model using this as- sumption. Figure 5 is a plot of eni against equivalent source resistance (Rs eq) with all of the contributing volt- age noise sources of Equation 2 shown. This plot gives the expected eni for a given Rs eq which assumes Rf||Rg = Rs eq for bias current cancellation. The total equivalent output voltage noise (eno) is eni ∗A v. Equation 1: General Noise Equation e e i R kTR i R R kT R R ni n n ss n f g f g eq eq =+ () ++ () () + () +− 2 2 2 44 || || Figure 3: Non-inverting Amplifer Noise Model Figure 1: Non-inverting Amplifier Configuration Figure 4: Noise Model with R f||Rg = Rseq Rf 3 2 4 7 6 Rg 0.1 µF 0.1 µF 6.8 µF 6.8 µF -Vcc +Vcc Vout Vs Vin Rb Rs Av = - Rf Rg CLC425 en Av 2Rs eq √4kT2Rs eq in √2 Equation 2: Noise Equation with Rf||Rg = Rs eq e e i R kT R ni n n s s eq eq =+ () + () 2 2 24 2 Figure 2: Inverting Amplifier Configuration 5 http://www.national.com |
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