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CLC407 Datasheet(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. CLC407
Description  Low-Cost, Low-Power Programmable Gain Buffer with Disable
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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CLC407 Datasheet(HTML) 2 Page - National Semiconductor (TI)

   
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PARAMETERS
CONDITIONS
TYP
MIN/MAX RATINGS
UNITS
NOTES
Ambient Temperature
CLC407AJ
+25˚C
+25˚C
0 to 70˚C
-40 to 85˚C
FREQUENCY DOMAIN RESPONSE
-3dB bandwidth
Vout < 1.0Vpp
110
75
50
45
MHz
B
Vout < 5.0Vpp
42
31
27
26
MHz
1
±0.1dB bandwidth
Vout < 1.0Vpp
30
15
MHz
gain flatness
Vout < 1.0Vpp
peaking
DC to 200MHz
0
0.4
0.6
0.8
dB
B
rolloff
<30MHz
0.1
0.5
0.65
0.7
dB
B
linear phase deviation
<20MHz
0.3
0.6
0.7
0.7
deg
differential gain
NTSC, RL=150
0.03
0.05
0.06
0.07
%
NTSC, RL=150
Ω (Note 2)
0.01
%
2
differential phase
NTSC, RL=150
0.25
0.4
0.5
0.55
deg
NTSC, RL=150
Ω (Note 2)
0.08
deg
2
TIME DOMAIN RESPONSE
rise and fall time
2V step
5
7.5
8.2
8.4
ns
settling time to 0.05%
2V step
18
27
36
39
ns
overshoot
2V step
3
12
12
12
%
slew rate
AV = +2
2V step
350
260
225
215
V/
µs
AV = -1
1V step
650
V/
µs
DISTORTION AND NOISE RESPONSE
2nd harmonic distortion
2Vpp, 1MHz/10MHz
-72/-52
-46
-45
-44
dBc
B, C
3rd harmonic distortion
2Vpp, 1MHz/10MHz
-70/-57
-50
-47
-46
dBc
B, C
equivalent input noise
non-inverting voltage
>1MHz
5
6.3
6.6
6.7
nV/
√Hz
inverting current
>1MHz
12
15
16
17
pA/
√Hz
non-inverting current
>1MHz
3
3.8
4
4.2
pA/
√Hz
STATIC DC PERFORMANCE
input offset voltage
1
5
7
8
mV
average drift
30
50
50
µV/˚C
input bias current
non-inverting
100
900
1600
2800
nA
A
average drift
3
8
11
nA/˚C
input bias current
inverting
1
5
6
8
µA
average drift
17
40
45
nA/˚C
output offset voltage
2.5
13
17
19
mV
A,3
amplifier gain error
±0.1%
±1.0%
±1.0%
±1.0%
V/V
A
internal feedback resistor (Rf)
250
±20%
power supply rejection ratio
DC
52
47
46
45
dB
B
common-mode rejection ratio
DC
50
45
44
43
dB
supply current
RL= ∞
3.5
4.0
4.1
4.4
mA
A
disabled
RL= ∞
0.8
0.9
0.95
1
mA
A
SWITCHING PERFORMANCE
turn on time
40
55
58
58
ns
turn off time
to >50dB attn. @ 10MHz
18
26
30
32
ns
off isolation
10MHz
85
80
80
80
dB
high input voltage
VIH
22
2
V
low input voltage
VIL
0.8
0.8
0.8
V
MISCELLANEOUS PERFORMANCE
input resistance
non-inverting
6
3
2.4
1
M
input capacitance
non-inverting
1
2
2
2
pF
common mode input range
±2.2
1.8
1.7
1.5
V
output voltage range
RL= ∞
+4.0,-3.3
+3.9,-3.2
+3.8,-3.1
+3.7,-2.8
V
output current
60
44
38
20
mA
output resistance, closed loop
0.06
0.2
0.25
0.4
Recommended gain range +1, +2 V/V
Min/max ratings are based on product characterization and simulation. Individual parameters are tested as noted. Outgoing quality levels are
determined from tested parameters.
CLC407 Electrical Characteristics (A
V = +2, Vcc = + 5V, RL = 100Ω unless specified)
Absolute Maximum Ratings
supply voltage
±7V
Iout is short circuit protected to ground
common-mode input voltage
±Vcc
maximum junction temperature
+175˚C
storage temperature range
-65˚C to +150˚C
lead temperature (soldering 10 sec)
+300˚C
Notes
1) At temps < 0˚C, spec is guaranteed for RL = 500Ω.
2) An 825
Ω pull-down resistor is connected between V
o and -Vcc.
3) Source impedance 1k
Ω.
A) J-level: spec is 100% tested at +25˚C, sample tested at +85˚C.
LC/MC-level: spec is 100% wafer probed at +25˚C.
B) J-level: spec is sample tested at +25˚C.
C) Guaranteed at 10MHz.
http://www.national.com
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