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DTC144TT1 Datasheet(PDF) 1 Page - ON Semiconductor |
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DTC144TT1 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page ![]() © Semiconductor Components Industries, LLC, 2002 May, 2002 – Rev. 1 1 Publication Order Number: DTC144TT1/D DTC144TT1 Preferred Device Bias Resistor Transistor NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base–emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SC–59 package which is designed for low power surface mount applications. • Simplifies Circuit Design • Reduces Board Space • Reduces Component Count • Moisture Sensitivity Level: 1 • ESD Rating – Human Body Model: Class 1 ESD Rating – Machine Model: Class B • The SC–59 package can be soldered using wave or reflow. The modified gull–winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die. • Available in 8 mm embossed tape and reel Use the Device Number to order the 7 inch/3000 unit reel. MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Rating Symbol Value Unit Collector-Base Voltage VCBO 50 Vdc Collector-Emitter Voltage VCEO 50 Vdc Collector Current IC 100 mAdc THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Total Device Dissipation TA = 25°C Derate above 25 °C PD 230 (Note 1.) 338 (Note 2.) 1.8 (Note 1.) 2.7 (Note 2.) mW °C/W Thermal Resistance – Junction-to-Ambient RθJA 540 (Note 1.) 370 (Note 2.) °C/W Thermal Resistance – Junction-to-Lead RθJL 264 (Note 1.) 287 (Note 2.) °C/W Junction and Storage Temperature Range TJ, Tstg –55 to +150 °C DEVICE MARKING AND RESISTOR VALUES Device Marking R1 (K) R2 (K) Shipping DTC144TT1 8T 47 ∞ 3000/Tape & Reel 1. FR–4 @ Minimum Pad 2. FR–4 @ 1.0 x 1.0 inch Pad SC–59 CASE 318D STYLE 1 Preferred devices are recommended choices for future use and best overall value. NPN SILICON BIAS RESISTOR TRANSISTOR 3 2 1 PIN 3 COLLECTOR (OUTPUT) PIN 1 EMITTER (GROUND) PIN 2 BASE (INPUT) R1 R2 MARKING DIAGRAM 8T = Specific Device Code M = Date Code 8T M Device Package Shipping ORDERING INFORMATION DTC144TT1 SC–59 3000/Tape & Reel http://onsemi.com |