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ADuM110N1BRZ Datasheet(PDF) 3 Page - Analog Devices |
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ADuM110N1BRZ Datasheet(HTML) 3 Page - Analog Devices |
3 / 16 page Data Sheet ADuM110N Rev. 0 | Page 3 of 16 SPECIFICATIONS ELECTRICAL CHARACTERISTICS—5 V OPERATION All typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V. Minimum/maximum specifications apply over the entire recommended operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V, and −40°C ≤ TA ≤ +125°C, unless otherwise noted. Switching specifications are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals. Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments SWITCHING SPECIFICATIONS Pulse Width PW 6.6 ns Within pulse width distortion (PWD) limit Data Rate 150 Mbps Within PWD limit Propagation Delay tPHL, tPLH 4.8 7.2 13 ns 50% input to 50% output Pulse Width Distortion PWD 0.5 3 ns |tPLH − tPHL| Change vs. Temperature 1.5 ps/°C Propagation Delay Skew tPSK 6.0 ns Between any two units at the same temperature, voltage, and load Jitter 380 ps p-p See the Jitter Measurement section 55 ps rms See the Jitter Measurement section DC SPECIFICATIONS Input Threshold Logic High VIH 0.7 × VDD1 V Logic Low VIL 0.3 × VDD1 V Output Voltage Logic High VOH VDD2 − 0.1 VDD2 V Output current (IO) = −20 μA, input voltage (VI) = VIH VDD2 − 0.4 VDD2 − 0.2 V IO = −4 mA, VI = VIH Logic Low VOL 0.0 0.1 V IO = 20 μA, VI = VIL 0.2 0.4 V IO = 4 mA, VI = VIL Input Current per Channel II −10 +0.01 +10 μA 0 V ≤ VI ≤ VDD1 Quiescent Supply Current IDD1 (Q) 0.9 1.4 mA VI = 0 (N0), 1 (N1)1 IDD2 (Q) 1.0 1.3 mA VI = 0 (N0), 1 (N1)1 IDD1 (Q) 3.6 6.0 mA VI = 1 (N0), 0 (N1)1 IDD2 (Q) 1.0 1.4 mA VI = 1 (N0), 0 (N1)1 Dynamic Supply Current Dynamic Output IDDI (D) 0.01 mA/Mbps Inputs switching, 50% duty cycle Dynamic Input IDDO (D) 0.02 mA/Mbps Inputs switching, 50% duty cycle Undervoltage Lockout UVLO Positive VDDx Threshold VDDxUV+ 1.6 V Negative VDDx Threshold VDDxUV− 1.5 V VDDx Hysteresis VDDxUVH 0.1 V AC SPECIFICATIONS Output Rise/Fall Time tR/tF 2.5 ns 10% to 90% Common-Mode Transient Immunity2 |CMH| 75 100 kV/μs VI = VDD1, VCM = 1000 V, transient magnitude = 800 V |CML| 75 100 kV/μs VI = 0 V, VCM = 1000 V, transient magnitude = 800 V 1 N0 indicates the ADuM110N0 models and N1 indicates the ADuM110N1 models. See the Ordering Guide section. 2 |CMH| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (VO) > 0.8 VDD2. |CML| is the maximum common- mode voltage slew rate that can be sustained while maintaining VO > 0.8 V. The common-mode voltage slew rates apply to both the rising and falling common-mode voltage edges. |
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